JPS57112068A - Manufacture of circuit device - Google Patents

Manufacture of circuit device

Info

Publication number
JPS57112068A
JPS57112068A JP18709480A JP18709480A JPS57112068A JP S57112068 A JPS57112068 A JP S57112068A JP 18709480 A JP18709480 A JP 18709480A JP 18709480 A JP18709480 A JP 18709480A JP S57112068 A JPS57112068 A JP S57112068A
Authority
JP
Japan
Prior art keywords
transistor
capacitor
wiring
upper electrode
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18709480A
Other languages
Japanese (ja)
Inventor
Masafumi Shigaki
Takao Shima
Osamu Akanuma
Kiyoshi Kazetani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP18709480A priority Critical patent/JPS57112068A/en
Publication of JPS57112068A publication Critical patent/JPS57112068A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/66—High-frequency adaptations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4685—Manufacturing of cross-over conductors

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)

Abstract

PURPOSE:To provide a thick mounting region to avoid damage and improve reliability of a device wired by bridge composition by a method wherein a plated layer is formed on an upper electrode of a capacitor on which active elements are mounted when the wiring is formed. CONSTITUTION:In the case of, for instance, a small microwave hybrid circuit, an inductor 22, a matching capacitor 26 and a single source capacitor 27 are formed on a spphirs substrate 21. Then the substrate is coated by a resist film 28 and apertures are made at bridge wiring connecting positions 29, 30 and a transistor mounting position 31. Then, after a metal film 32 such as Au or Cr-Pt-Au is formed, a resist mask 33 is formed where platng is not required and a wiring 34 and a mounting position 35 by Au plating. After the resist films 33, 28 and the excess metal film 32 are removed, a transistor 36 is mounted. With above confuguration the upper electrode 25 of the single source capcitor 27 is reinforced, so that the damage expected when the transistor is mounted is avoided, and the cost is reduced by reducing the consumption of the precious metals.
JP18709480A 1980-12-29 1980-12-29 Manufacture of circuit device Pending JPS57112068A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18709480A JPS57112068A (en) 1980-12-29 1980-12-29 Manufacture of circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18709480A JPS57112068A (en) 1980-12-29 1980-12-29 Manufacture of circuit device

Publications (1)

Publication Number Publication Date
JPS57112068A true JPS57112068A (en) 1982-07-12

Family

ID=16199994

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18709480A Pending JPS57112068A (en) 1980-12-29 1980-12-29 Manufacture of circuit device

Country Status (1)

Country Link
JP (1) JPS57112068A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5363976A (en) * 1976-11-19 1978-06-07 Fujitsu Ltd Semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5363976A (en) * 1976-11-19 1978-06-07 Fujitsu Ltd Semiconductor device

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