JPS5710977A - Semiconductor circuit - Google Patents

Semiconductor circuit

Info

Publication number
JPS5710977A
JPS5710977A JP5306181A JP5306181A JPS5710977A JP S5710977 A JPS5710977 A JP S5710977A JP 5306181 A JP5306181 A JP 5306181A JP 5306181 A JP5306181 A JP 5306181A JP S5710977 A JPS5710977 A JP S5710977A
Authority
JP
Japan
Prior art keywords
semiconductor circuit
semiconductor
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5306181A
Other languages
English (en)
Other versions
JPH0130313B2 (ja
Inventor
Narandasu Kotechi Haritsushiyu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS5710977A publication Critical patent/JPS5710977A/ja
Publication of JPH0130313B2 publication Critical patent/JPH0130313B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0416—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and no select transistor, e.g. UV EPROM
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H01L29/7882—Programmable transistors with only two possible levels of programmation charging by injection of carriers through a conductive insulator, e.g. Poole-Frankel conduction

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)
JP5306181A 1980-05-27 1981-04-10 Semiconductor circuit Granted JPS5710977A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/153,359 US4334292A (en) 1980-05-27 1980-05-27 Low voltage electrically erasable programmable read only memory

Publications (2)

Publication Number Publication Date
JPS5710977A true JPS5710977A (en) 1982-01-20
JPH0130313B2 JPH0130313B2 (ja) 1989-06-19

Family

ID=22546878

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5306181A Granted JPS5710977A (en) 1980-05-27 1981-04-10 Semiconductor circuit

Country Status (8)

Country Link
US (1) US4334292A (ja)
EP (1) EP0040701B1 (ja)
JP (1) JPS5710977A (ja)
AU (1) AU540886B2 (ja)
BR (1) BR8103000A (ja)
CA (1) CA1149064A (ja)
DE (1) DE3176835D1 (ja)
ES (1) ES502489A0 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59110215U (ja) * 1983-01-13 1984-07-25 サンデン株式会社 車輌用空気調和装置の制御回路

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4380057A (en) * 1980-10-27 1983-04-12 International Business Machines Corporation Electrically alterable double dense memory
JPS57204172A (en) * 1981-06-08 1982-12-14 Ibm Field effect transistor
US4939559A (en) * 1981-12-14 1990-07-03 International Business Machines Corporation Dual electron injector structures using a conductive oxide between injectors
US4535349A (en) * 1981-12-31 1985-08-13 International Business Machines Corporation Non-volatile memory cell using a crystalline storage element with capacitively coupled sensing
JPS5960797A (ja) * 1982-09-30 1984-04-06 Toshiba Corp 不揮発性半導体メモリ装置
US4639893A (en) * 1984-05-15 1987-01-27 Wafer Scale Integration, Inc. Self-aligned split gate EPROM
US4795719A (en) * 1984-05-15 1989-01-03 Waferscale Integration, Inc. Self-aligned split gate eprom process
US4868629A (en) * 1984-05-15 1989-09-19 Waferscale Integration, Inc. Self-aligned split gate EPROM
JPS6113671A (ja) * 1984-06-25 1986-01-21 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション メモリのチヤ−ジ記憶構造
US4717943A (en) * 1984-06-25 1988-01-05 International Business Machines Charge storage structure for nonvolatile memories
US4665417A (en) * 1984-09-27 1987-05-12 International Business Machines Corporation Non-volatile dynamic random access memory cell
JPS6180866A (ja) * 1984-09-27 1986-04-24 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション 不揮発性半導体メモリ・セル
US4729115A (en) * 1984-09-27 1988-03-01 International Business Machines Corporation Non-volatile dynamic random access memory cell
US4616245A (en) * 1984-10-29 1986-10-07 Ncr Corporation Direct-write silicon nitride EEPROM cell
US4665503A (en) * 1985-01-15 1987-05-12 Massachusetts Institute Of Technology Non-volatile memory devices
US4861976A (en) * 1988-06-06 1989-08-29 American Telephone And Telegraph Company, At&T Bell Laboratories Optical or opto-electronic device having a trapping layer in contact with a semiconductive layer
KR920001402B1 (ko) * 1988-11-29 1992-02-13 삼성전자 주식회사 불휘발성 반도체 기억소자
JPH0777240B2 (ja) * 1989-01-20 1995-08-16 富士通株式会社 半導体装置の製造方法
US5258095A (en) * 1989-01-20 1993-11-02 Fujitsu Limited Method for producing a device having an insulator sandwiched between two semiconductor layers
DE68913190T2 (de) * 1989-03-31 1994-08-04 Philips Nv EPROM, der eine mehrfache Verwendung der Bitleitungskontakte ermöglicht.
US5122985A (en) * 1990-04-16 1992-06-16 Giovani Santin Circuit and method for erasing eeprom memory arrays to prevent over-erased cells
JPH05102438A (ja) * 1991-10-04 1993-04-23 Mitsubishi Electric Corp 不揮発性半導体記憶装置
US5138576A (en) * 1991-11-06 1992-08-11 Altera Corporation Method and apparatus for erasing an array of electrically erasable EPROM cells
US5359571A (en) * 1993-01-27 1994-10-25 Yu Shih Chiang Memory array having a plurality of address partitions
KR0149528B1 (ko) * 1994-05-25 1998-10-01 김주용 반도체 소자의 콘트롤 게이트 전극 형성방법
US5818082A (en) * 1996-03-04 1998-10-06 Advanced Micro Devices, Inc. E2 PROM device having erase gate in oxide isolation region in shallow trench and method of manufacture thereof
US5703809A (en) * 1996-10-01 1997-12-30 Microchip Technology Incorporated Overcharge/discharge voltage regulator for EPROM memory array
US7569882B2 (en) * 2003-12-23 2009-08-04 Interuniversitair Microelektronica Centrum (Imec) Non-volatile multibit memory cell and method of manufacturing thereof
US7092288B2 (en) * 2004-02-04 2006-08-15 Atmel Corporation Non-volatile memory array with simultaneous write and erase feature
US7020020B1 (en) * 2004-09-21 2006-03-28 Atmel Corporation Low voltage non-volatile memory cells using twin bit line current sensing
US7414460B1 (en) 2006-03-31 2008-08-19 Integrated Device Technology, Inc. System and method for integrated circuit charge recycling

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5099281A (ja) * 1973-12-28 1975-08-06
JPS51117838A (en) * 1975-04-10 1976-10-16 Shindengen Electric Mfg Co Ltd Semiconductor memory device

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3825946A (en) * 1971-01-15 1974-07-23 Intel Corp Electrically alterable floating gate device and method for altering same
US4161039A (en) * 1976-12-15 1979-07-10 Siemens Aktiengesellschaft N-Channel storage FET
US4104675A (en) * 1977-06-21 1978-08-01 International Business Machines Corporation Moderate field hole and electron injection from one interface of MIM or MIS structures
US4274012A (en) * 1979-01-24 1981-06-16 Xicor, Inc. Substrate coupled floating gate memory cell

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5099281A (ja) * 1973-12-28 1975-08-06
JPS51117838A (en) * 1975-04-10 1976-10-16 Shindengen Electric Mfg Co Ltd Semiconductor memory device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59110215U (ja) * 1983-01-13 1984-07-25 サンデン株式会社 車輌用空気調和装置の制御回路

Also Published As

Publication number Publication date
ES8204209A1 (es) 1982-04-01
US4334292A (en) 1982-06-08
ES502489A0 (es) 1982-04-01
CA1149064A (en) 1983-06-28
AU540886B2 (en) 1984-12-06
EP0040701B1 (en) 1988-08-03
DE3176835D1 (en) 1988-09-08
BR8103000A (pt) 1982-02-02
EP0040701A1 (en) 1981-12-02
JPH0130313B2 (ja) 1989-06-19
AU7007581A (en) 1981-12-03

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