JPS57108930A - Controlling method for pipeline arithmetic device - Google Patents

Controlling method for pipeline arithmetic device

Info

Publication number
JPS57108930A
JPS57108930A JP55183717A JP18371780A JPS57108930A JP S57108930 A JPS57108930 A JP S57108930A JP 55183717 A JP55183717 A JP 55183717A JP 18371780 A JP18371780 A JP 18371780A JP S57108930 A JPS57108930 A JP S57108930A
Authority
JP
Japan
Prior art keywords
prescience
counter
stage
signal
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55183717A
Other languages
Japanese (ja)
Other versions
JPS628816B2 (en
Inventor
Masanori Mogi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55183717A priority Critical patent/JPS57108930A/en
Publication of JPS57108930A publication Critical patent/JPS57108930A/en
Publication of JPS628816B2 publication Critical patent/JPS628816B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G06F9/3869—Implementation aspects, e.g. pipeline latches; pipeline synchronisation and clocking

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)

Abstract

PURPOSE:To process data successively at series-connected arithmetic stages by initially setting the number of elements in a counter for every time and by obtaining the output timing of a prescience signal on a case-by-case basis. CONSTITUTION:The number EN of elements is preset in a counter 31. The 1st corresponding data is also set in the registers R2A and R3A of a stage A. While the data is shifted down, stage by stage, synchronizing with a one-cycle clock CC, the contents of the counter 31 are decreased, one by one, by a decrement means 32. When operation is started for prescience once the count value of the counter 31 reaches one, a decoder 33 outputs logic ''1'' on detecting that. The output of the detecting circuit 34 of a following stage B is inverted on the reception of the logic ''1'' to generate a prescience signal. The prescience signal W shows that data D1 is outputted from a register R1D.
JP55183717A 1980-12-26 1980-12-26 Controlling method for pipeline arithmetic device Granted JPS57108930A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55183717A JPS57108930A (en) 1980-12-26 1980-12-26 Controlling method for pipeline arithmetic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55183717A JPS57108930A (en) 1980-12-26 1980-12-26 Controlling method for pipeline arithmetic device

Publications (2)

Publication Number Publication Date
JPS57108930A true JPS57108930A (en) 1982-07-07
JPS628816B2 JPS628816B2 (en) 1987-02-25

Family

ID=16140719

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55183717A Granted JPS57108930A (en) 1980-12-26 1980-12-26 Controlling method for pipeline arithmetic device

Country Status (1)

Country Link
JP (1) JPS57108930A (en)

Also Published As

Publication number Publication date
JPS628816B2 (en) 1987-02-25

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