JPS5710822A - Integrated circuit device - Google Patents

Integrated circuit device

Info

Publication number
JPS5710822A
JPS5710822A JP8489380A JP8489380A JPS5710822A JP S5710822 A JPS5710822 A JP S5710822A JP 8489380 A JP8489380 A JP 8489380A JP 8489380 A JP8489380 A JP 8489380A JP S5710822 A JPS5710822 A JP S5710822A
Authority
JP
Japan
Prior art keywords
circuit
voltage
potential
substrate
point
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8489380A
Other languages
Japanese (ja)
Inventor
Hideo Noguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP8489380A priority Critical patent/JPS5710822A/en
Publication of JPS5710822A publication Critical patent/JPS5710822A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is dc
    • G05F3/10Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices

Abstract

PURPOSE:To prevent the influence of a short channel phenomenon, by providing a voltage dropping circuit on a semiconductor substrate on which an integrated circuit has been provided, and using the voltage which is obtained by this voltage dropping circuit, as circuit operating voltage. CONSTITUTION:In case when each forward direction voltage of a diode is set to VF=0.4V, and its forward direction current is set to IF=ImuA, if 5V is applied to a point A, voltage drop of 1.2V occurs at a point D when obtaining a current ImuA, and the potential of 3.8V is obtained. Since there is an operating area of a circuit 10 in the next stage, however, if a necessary current for consumption is 100mA, the potential of 3V is obtained at the point D, and working voltage of the circuit 10 becomes 3V. In an IC on which this equivalent circuit has been formed, 3 p-n junction which have been isolated from the potential of a p type silicon substrate 11 are coupled in series to the substrate 11 which is same as an IC substrate on which the circuit 10 has been formed.
JP8489380A 1980-06-23 1980-06-23 Integrated circuit device Pending JPS5710822A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8489380A JPS5710822A (en) 1980-06-23 1980-06-23 Integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8489380A JPS5710822A (en) 1980-06-23 1980-06-23 Integrated circuit device

Publications (1)

Publication Number Publication Date
JPS5710822A true JPS5710822A (en) 1982-01-20

Family

ID=13843418

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8489380A Pending JPS5710822A (en) 1980-06-23 1980-06-23 Integrated circuit device

Country Status (1)

Country Link
JP (1) JPS5710822A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5990120A (en) * 1982-09-22 1984-05-24 ゼネラル・エレクトリック・カンパニイ Protective circuit
JPS59107560A (en) * 1982-12-13 1984-06-21 Hitachi Ltd Semiconductor integrated circuit device
JPS59112639A (en) * 1982-12-17 1984-06-29 Hitachi Ltd Semiconductor integrated circuit
JPS59171326A (en) * 1983-03-18 1984-09-27 Nec Corp Input circuit
JPS63193719A (en) * 1987-02-06 1988-08-11 Hitachi Ltd Logic circuit and semiconductor integrated circuit device using the same
JPH021613A (en) * 1987-08-01 1990-01-05 Samsung Semiconductor & Telecommun Co Ltd C-mos ttl input buffer utilizing resistance means
JP2005236992A (en) * 2004-02-16 2005-09-02 Samsung Electronics Co Ltd Multi-level shifter circuit for flat panel source driver

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5310046A (en) * 1976-07-15 1978-01-30 Seiko Instr & Electronics Ltd Electronic circuit
JPS5312061A (en) * 1976-07-21 1978-02-03 Seiko Instr & Electronics Ltd Electronic circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5310046A (en) * 1976-07-15 1978-01-30 Seiko Instr & Electronics Ltd Electronic circuit
JPS5312061A (en) * 1976-07-21 1978-02-03 Seiko Instr & Electronics Ltd Electronic circuit

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5990120A (en) * 1982-09-22 1984-05-24 ゼネラル・エレクトリック・カンパニイ Protective circuit
JPS59107560A (en) * 1982-12-13 1984-06-21 Hitachi Ltd Semiconductor integrated circuit device
JPH058584B2 (en) * 1982-12-13 1993-02-02 Hitachi Ltd
JPS59112639A (en) * 1982-12-17 1984-06-29 Hitachi Ltd Semiconductor integrated circuit
JPS59171326A (en) * 1983-03-18 1984-09-27 Nec Corp Input circuit
JPS63193719A (en) * 1987-02-06 1988-08-11 Hitachi Ltd Logic circuit and semiconductor integrated circuit device using the same
JPH021613A (en) * 1987-08-01 1990-01-05 Samsung Semiconductor & Telecommun Co Ltd C-mos ttl input buffer utilizing resistance means
JP2005236992A (en) * 2004-02-16 2005-09-02 Samsung Electronics Co Ltd Multi-level shifter circuit for flat panel source driver

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