JPS57105077A - Main storage controller - Google Patents

Main storage controller

Info

Publication number
JPS57105077A
JPS57105077A JP18122680A JP18122680A JPS57105077A JP S57105077 A JPS57105077 A JP S57105077A JP 18122680 A JP18122680 A JP 18122680A JP 18122680 A JP18122680 A JP 18122680A JP S57105077 A JPS57105077 A JP S57105077A
Authority
JP
Japan
Prior art keywords
processor
main storage
devices
data
port
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18122680A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6160472B2 (enExample
Inventor
Mikio Ito
Shoji Nakatani
Hiroshi Tamura
Yuji Oinaga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP18122680A priority Critical patent/JPS57105077A/ja
Publication of JPS57105077A publication Critical patent/JPS57105077A/ja
Publication of JPS6160472B2 publication Critical patent/JPS6160472B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Complex Calculations (AREA)
JP18122680A 1980-12-23 1980-12-23 Main storage controller Granted JPS57105077A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18122680A JPS57105077A (en) 1980-12-23 1980-12-23 Main storage controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18122680A JPS57105077A (en) 1980-12-23 1980-12-23 Main storage controller

Publications (2)

Publication Number Publication Date
JPS57105077A true JPS57105077A (en) 1982-06-30
JPS6160472B2 JPS6160472B2 (enExample) 1986-12-20

Family

ID=16097010

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18122680A Granted JPS57105077A (en) 1980-12-23 1980-12-23 Main storage controller

Country Status (1)

Country Link
JP (1) JPS57105077A (enExample)

Also Published As

Publication number Publication date
JPS6160472B2 (enExample) 1986-12-20

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