JPS5714925A - Initializing system - Google Patents

Initializing system

Info

Publication number
JPS5714925A
JPS5714925A JP8876480A JP8876480A JPS5714925A JP S5714925 A JPS5714925 A JP S5714925A JP 8876480 A JP8876480 A JP 8876480A JP 8876480 A JP8876480 A JP 8876480A JP S5714925 A JPS5714925 A JP S5714925A
Authority
JP
Japan
Prior art keywords
initialization
transfer
data
signal
inz
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8876480A
Other languages
Japanese (ja)
Inventor
Tatsuo Ishikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP8876480A priority Critical patent/JPS5714925A/en
Publication of JPS5714925A publication Critical patent/JPS5714925A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

PURPOSE:To avoid an error of the data transfer, by waiting the initialization of a device until the transfer of a data block is over in case a request is given to an initialization of the device during the transfer of data. CONSTITUTION:Various types of signals CNTL are delivered for read/write control to an external storage device from a data transfer controlling circuit 101. In this case, an inspection is given to the presence or absence of the initialization request (INZ) signal for initialization of a device. Thus the CNTL signal is delivered in case no INZ signal exists. If the INZ signal exists, the output of the CNTL signal is inhibited by the circuit 101. At the same time, the initialization signal CLR is delivered for initialization of device with a delay of transfer time equivalent to a sector from a delaying circuit 102. As a result, no initialization is carried out for a device during a transfer of data although an initialization request is given. Thus the initialization is carried out after the data of a sector has been transferred.
JP8876480A 1980-06-30 1980-06-30 Initializing system Pending JPS5714925A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8876480A JPS5714925A (en) 1980-06-30 1980-06-30 Initializing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8876480A JPS5714925A (en) 1980-06-30 1980-06-30 Initializing system

Publications (1)

Publication Number Publication Date
JPS5714925A true JPS5714925A (en) 1982-01-26

Family

ID=13951930

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8876480A Pending JPS5714925A (en) 1980-06-30 1980-06-30 Initializing system

Country Status (1)

Country Link
JP (1) JPS5714925A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62104854U (en) * 1985-12-20 1987-07-04

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62104854U (en) * 1985-12-20 1987-07-04

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