JPS57102008A - Control of warp of semiconductor wafer - Google Patents

Control of warp of semiconductor wafer

Info

Publication number
JPS57102008A
JPS57102008A JP17712480A JP17712480A JPS57102008A JP S57102008 A JPS57102008 A JP S57102008A JP 17712480 A JP17712480 A JP 17712480A JP 17712480 A JP17712480 A JP 17712480A JP S57102008 A JPS57102008 A JP S57102008A
Authority
JP
Japan
Prior art keywords
semiconductor wafer
control
warp
curve
high density
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17712480A
Other languages
Japanese (ja)
Inventor
Masahiro Ishida
Shinichiro Takasu
Yoshio Miura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
NEC Corp
Original Assignee
Toshiba Corp
NEC Corp
Tokyo Shibaura Electric Co Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, NEC Corp, Tokyo Shibaura Electric Co Ltd, Nippon Electric Co Ltd filed Critical Toshiba Corp
Priority to JP17712480A priority Critical patent/JPS57102008A/en
Publication of JPS57102008A publication Critical patent/JPS57102008A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE:To reduce the rate of generation of inferiot products by irradiating radioactive radiation of high density energy on one face of a semiconductor wafer to control a curve on the device manufacturing surface of said wafer. CONSTITUTION:By irradiating radial rays of high density energy on a semiconductor wafer the size and mark of residual stress are reversed. Basing on said discovery the irradiation region determined basing on the measured results of the semiconductor wafer, of which the direction and quantity of a curve is premeasured, is irradiated with the laser beam, of which various conditions such as the output and the scanning speed is predetermined, to control the warp thereof.
JP17712480A 1980-12-17 1980-12-17 Control of warp of semiconductor wafer Pending JPS57102008A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17712480A JPS57102008A (en) 1980-12-17 1980-12-17 Control of warp of semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17712480A JPS57102008A (en) 1980-12-17 1980-12-17 Control of warp of semiconductor wafer

Publications (1)

Publication Number Publication Date
JPS57102008A true JPS57102008A (en) 1982-06-24

Family

ID=16025581

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17712480A Pending JPS57102008A (en) 1980-12-17 1980-12-17 Control of warp of semiconductor wafer

Country Status (1)

Country Link
JP (1) JPS57102008A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0318733A (en) * 1989-06-16 1991-01-28 Hitachi Ltd Method and device for stress monitoring
US20090309191A1 (en) * 2008-06-11 2009-12-17 Infineon Technologies Ag Semiconductor device
WO2018097995A1 (en) * 2016-11-22 2018-05-31 Snaptrack, Inc. Apparatus and method for connecting two substrates for an electric component
CN114227388A (en) * 2021-12-09 2022-03-25 甘肃旭晶新材料有限公司 Grinding method for sapphire wafer with over-standard warpage

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0318733A (en) * 1989-06-16 1991-01-28 Hitachi Ltd Method and device for stress monitoring
US20090309191A1 (en) * 2008-06-11 2009-12-17 Infineon Technologies Ag Semiconductor device
US8900715B2 (en) * 2008-06-11 2014-12-02 Infineon Technologies Ag Semiconductor device
WO2018097995A1 (en) * 2016-11-22 2018-05-31 Snaptrack, Inc. Apparatus and method for connecting two substrates for an electric component
CN114227388A (en) * 2021-12-09 2022-03-25 甘肃旭晶新材料有限公司 Grinding method for sapphire wafer with over-standard warpage

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