JPS57101447A - Clock phase lock circuit - Google Patents

Abstract

PURPOSE:To achieve clock phase lock without the provision of an oscillator, by controlling a PLL with a phase difference signal between the clock component picked up from a modulated signal and a clock signal from a clock source. CONSTITUTION:A clock from a clock source 1 is applied to a monostable multivibrator 13. A clock component is picked up at a clock pickup section 8 from a modulated signal from a modulator 4, detected at a phase detector 9 and becomes a pulse width control signal of the monostable multivibrator 13 via a low pass filter 10 and amplifier 11. A monostable multivibrator 14 outputs a phase control signal of a phase detector 9 according to the input pulse width. Frequencies of each input of the detector 9 are coincident through phase lock by the clock of the clock source 1. Thus, the phase lock can be made in a short time without oscillators such as a VCO.