JPS5451310A - Composite modulator circuit - Google Patents

Composite modulator circuit

Info

Publication number
JPS5451310A
JPS5451310A JP11683477A JP11683477A JPS5451310A JP S5451310 A JPS5451310 A JP S5451310A JP 11683477 A JP11683477 A JP 11683477A JP 11683477 A JP11683477 A JP 11683477A JP S5451310 A JPS5451310 A JP S5451310A
Authority
JP
Japan
Prior art keywords
frequency
digital signal
shift
output
dividing ratio
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11683477A
Other languages
Japanese (ja)
Inventor
Mitsuo Toritani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP11683477A priority Critical patent/JPS5451310A/en
Publication of JPS5451310A publication Critical patent/JPS5451310A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J9/00Multiplex systems in which each channel is represented by a different type of modulation of the carrier

Abstract

PURPOSE:To shift a frequency independently of analog modulation by varying the dividing ratio of the reference frequency of a frequency synthesizer with a digital signal as a method shift-keying a digital signal frequency. CONSTITUTION:The output of reference frequenct oscillator 1 and a data signal are both inputted to variable divider 2 which is able to vary a dividing ratio for a frequency shift with a digital signal, and phase comparator 3 makes the output of it agree with a frequency 1/N as high as the oscillation frequency of voltage control oscillator 6. Then, it is inputted together with a sound signal to oscillator 6 via low-pass filter 4 and amplifier 5, and its output is amplified or multiplied before being sent out. In this way, the frequency shift modulation of a digital signal can be done by varying the dividing ratio as well as composite modulation simultaneously with a sound.
JP11683477A 1977-09-30 1977-09-30 Composite modulator circuit Pending JPS5451310A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11683477A JPS5451310A (en) 1977-09-30 1977-09-30 Composite modulator circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11683477A JPS5451310A (en) 1977-09-30 1977-09-30 Composite modulator circuit

Publications (1)

Publication Number Publication Date
JPS5451310A true JPS5451310A (en) 1979-04-23

Family

ID=14696770

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11683477A Pending JPS5451310A (en) 1977-09-30 1977-09-30 Composite modulator circuit

Country Status (1)

Country Link
JP (1) JPS5451310A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5323125A (en) * 1993-03-15 1994-06-21 Motorola, Inc. Frequency agile method for transmitting multi-level data

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5323125A (en) * 1993-03-15 1994-06-21 Motorola, Inc. Frequency agile method for transmitting multi-level data

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