JPS5694766A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5694766A
JPS5694766A JP17106579A JP17106579A JPS5694766A JP S5694766 A JPS5694766 A JP S5694766A JP 17106579 A JP17106579 A JP 17106579A JP 17106579 A JP17106579 A JP 17106579A JP S5694766 A JPS5694766 A JP S5694766A
Authority
JP
Japan
Prior art keywords
type
area
emitter
transistor
epitaxial layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17106579A
Other languages
Japanese (ja)
Other versions
JPS6043030B2 (en
Inventor
Yunosuke Kawabe
Yoshinobu Monma
Kazuhiro Toyoda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP54171065A priority Critical patent/JPS6043030B2/en
Publication of JPS5694766A publication Critical patent/JPS5694766A/en
Publication of JPS6043030B2 publication Critical patent/JPS6043030B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/082Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
    • H01L27/0821Combination of lateral and vertical transistors only

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Static Random-Access Memory (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)

Abstract

PURPOSE:To quicken a switching speed as well as to miniaturize a pattern by a method wherein a p type emitter area is formed in a concave part of an n type epitaxial layer in a bipolar memory cell having a pnp transistor load. CONSTITUTION:The surface of an n<-> type epitaxial layer 17 separated by a p<+> type area 27 is formed into a concave face 25 through an etching, and thereafter, a p type impurity diffusion is performed to form an emitter area 15 and a collector area 19 of a pnp type transistor for load. A p<+> type emitter area 15 is formed so as to be in contact with an n<+> embedded layer 26. The above-mentioned n<-> epitaxial layer 17 is a base area of the npn type transistor and is jointly a collector area of the npn type transistor. Thereafter, emitter areas 21, 23 of the npn type transistor are formed. With this, the emitter area 15 reaches an n<+> embedded layer with a comparatively short diffusion distance, accordingly, the occupation pattern of the memory cell can be miniaturized and the operation speed can be also improved.
JP54171065A 1979-12-28 1979-12-28 semiconductor equipment Expired JPS6043030B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54171065A JPS6043030B2 (en) 1979-12-28 1979-12-28 semiconductor equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54171065A JPS6043030B2 (en) 1979-12-28 1979-12-28 semiconductor equipment

Publications (2)

Publication Number Publication Date
JPS5694766A true JPS5694766A (en) 1981-07-31
JPS6043030B2 JPS6043030B2 (en) 1985-09-26

Family

ID=15916393

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54171065A Expired JPS6043030B2 (en) 1979-12-28 1979-12-28 semiconductor equipment

Country Status (1)

Country Link
JP (1) JPS6043030B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02311893A (en) * 1989-05-29 1990-12-27 Hitachi Ltd High-accuracy pll device

Also Published As

Publication number Publication date
JPS6043030B2 (en) 1985-09-26

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