JPS5694764A - Protection method of semiconductor device - Google Patents

Protection method of semiconductor device

Info

Publication number
JPS5694764A
JPS5694764A JP17098479A JP17098479A JPS5694764A JP S5694764 A JPS5694764 A JP S5694764A JP 17098479 A JP17098479 A JP 17098479A JP 17098479 A JP17098479 A JP 17098479A JP S5694764 A JPS5694764 A JP S5694764A
Authority
JP
Japan
Prior art keywords
semiconductor element
lead
semiconductor device
thereafter
puncture
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17098479A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6250980B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Rikuro Sono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP17098479A priority Critical patent/JPS5694764A/ja
Publication of JPS5694764A publication Critical patent/JPS5694764A/ja
Publication of JPS6250980B2 publication Critical patent/JPS6250980B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/60Protection against electrostatic charges or discharges, e.g. Faraday shields
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/15165Monolayer substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP17098479A 1979-12-28 1979-12-28 Protection method of semiconductor device Granted JPS5694764A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17098479A JPS5694764A (en) 1979-12-28 1979-12-28 Protection method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17098479A JPS5694764A (en) 1979-12-28 1979-12-28 Protection method of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5694764A true JPS5694764A (en) 1981-07-31
JPS6250980B2 JPS6250980B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1987-10-28

Family

ID=15914967

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17098479A Granted JPS5694764A (en) 1979-12-28 1979-12-28 Protection method of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5694764A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5983189A (ja) * 1982-11-04 1984-05-14 セイコーエプソン株式会社 液晶電気光学装置の製造方法
JPS6177345A (ja) * 1984-09-21 1986-04-19 Fujitsu Ltd 半導体装置の製造方法
DE102004064150B4 (de) * 2004-06-29 2010-04-29 Osram Opto Semiconductors Gmbh Elektronisches Bauteil mit Gehäuse mit leitfähiger Beschichtung zum ESD-Schutz

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0642213U (ja) * 1992-11-11 1994-06-03 大日本インキ化学工業株式会社 配送伝票

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50105545U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1974-02-04 1975-08-30
JPS576255A (en) * 1980-06-12 1982-01-13 Kikai Syst Shinko Kyokai Solar heat collector

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50105545U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1974-02-04 1975-08-30
JPS576255A (en) * 1980-06-12 1982-01-13 Kikai Syst Shinko Kyokai Solar heat collector

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5983189A (ja) * 1982-11-04 1984-05-14 セイコーエプソン株式会社 液晶電気光学装置の製造方法
JPS6177345A (ja) * 1984-09-21 1986-04-19 Fujitsu Ltd 半導体装置の製造方法
DE102004064150B4 (de) * 2004-06-29 2010-04-29 Osram Opto Semiconductors Gmbh Elektronisches Bauteil mit Gehäuse mit leitfähiger Beschichtung zum ESD-Schutz

Also Published As

Publication number Publication date
JPS6250980B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1987-10-28

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