JPS5694663A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5694663A
JPS5694663A JP17239779A JP17239779A JPS5694663A JP S5694663 A JPS5694663 A JP S5694663A JP 17239779 A JP17239779 A JP 17239779A JP 17239779 A JP17239779 A JP 17239779A JP S5694663 A JPS5694663 A JP S5694663A
Authority
JP
Japan
Prior art keywords
layer
laminate
substrate
120min
thick
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17239779A
Other languages
Japanese (ja)
Other versions
JPS6026292B2 (en
Inventor
Shuzo Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP54172397A priority Critical patent/JPS6026292B2/en
Publication of JPS5694663A publication Critical patent/JPS5694663A/en
Publication of JPS6026292B2 publication Critical patent/JPS6026292B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/4827Materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04026Bonding areas specifically adapted for layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83191Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01024Chromium [Cr]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0105Tin [Sn]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1301Thyristor

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE:To eliminate the deterioration of the soldering property by constituting an ohmic electrode by a laminate of a Cr layer, an Ni layer, an Ni oxidation preventing layer of Au or Sn and an Ag layer from the side of a substrate when the electrode is formed on the Si substrate. CONSTITUTION:On the Si substrate 10 the Cr layer 11 about 100-1,000Angstrom thick and the Ni layer 12 about 1,000-10,000Angstrom thick are laminated and connected thereto, whereon the Ni oxidation preventing layer 13 formed of Au and having the thickness of about 100-3,000Angstrom is formed, and the laminate thus prepared is subjected to heat treatment for 30-120min at a temperature of 250-300 deg.C in the ambience of N2. At this time, Sn may also be used for the layer 13, and in this case the thickness is set to be about 100-1,000Angstrom and the laminate is subjected to heat treatment at a temperature of 300-500 deg.C in an H2 gas for the first 1-5min and, after the surface oxidized film of the layer 13 is reduced in the first treatment it is reat treated in a mixed gas containing H2 in the ratio of H2:H2=1:10 for 30- 120min After that, on to the laminate thus treated is connected the Ag layer 14. Thus, the oxidation of the Ni layer 12 is prevented.
JP54172397A 1979-12-27 1979-12-27 Manufacturing method of semiconductor device Expired JPS6026292B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54172397A JPS6026292B2 (en) 1979-12-27 1979-12-27 Manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54172397A JPS6026292B2 (en) 1979-12-27 1979-12-27 Manufacturing method of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5694663A true JPS5694663A (en) 1981-07-31
JPS6026292B2 JPS6026292B2 (en) 1985-06-22

Family

ID=15941172

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54172397A Expired JPS6026292B2 (en) 1979-12-27 1979-12-27 Manufacturing method of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6026292B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5864036A (en) * 1981-10-13 1983-04-16 Nec Home Electronics Ltd Manufacture of semiconductor device
JPS58182840A (en) * 1982-04-21 1983-10-25 Matsushita Electronics Corp Semiconductor device
JPS62229848A (en) * 1986-03-29 1987-10-08 Toshiba Corp Semiconductor device
JPS63161631A (en) * 1986-12-24 1988-07-05 Nec Corp Silicon semiconductor element
US7842889B2 (en) 2005-04-25 2010-11-30 Hitachi Kyowa Engineering Co., Ltd. Substrate for mounting electronic part and electronic part

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5165659U (en) * 1974-11-18 1976-05-24

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5165659U (en) * 1974-11-18 1976-05-24

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5864036A (en) * 1981-10-13 1983-04-16 Nec Home Electronics Ltd Manufacture of semiconductor device
JPS58182840A (en) * 1982-04-21 1983-10-25 Matsushita Electronics Corp Semiconductor device
JPS62229848A (en) * 1986-03-29 1987-10-08 Toshiba Corp Semiconductor device
JPS63161631A (en) * 1986-12-24 1988-07-05 Nec Corp Silicon semiconductor element
US7842889B2 (en) 2005-04-25 2010-11-30 Hitachi Kyowa Engineering Co., Ltd. Substrate for mounting electronic part and electronic part
DE102006011232B4 (en) * 2005-04-25 2012-11-08 Hitachi Kyowa Engineering Co., Ltd. Substrate for mounting an electronic component and electronic component

Also Published As

Publication number Publication date
JPS6026292B2 (en) 1985-06-22

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