JPS5694663A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5694663A JPS5694663A JP17239779A JP17239779A JPS5694663A JP S5694663 A JPS5694663 A JP S5694663A JP 17239779 A JP17239779 A JP 17239779A JP 17239779 A JP17239779 A JP 17239779A JP S5694663 A JPS5694663 A JP S5694663A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- laminate
- substrate
- 120min
- thick
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/4827—Materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04026—Bonding areas specifically adapted for layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01024—Chromium [Cr]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1301—Thyristor
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electrodes Of Semiconductors (AREA)
- Die Bonding (AREA)
Abstract
PURPOSE:To eliminate the deterioration of the soldering property by constituting an ohmic electrode by a laminate of a Cr layer, an Ni layer, an Ni oxidation preventing layer of Au or Sn and an Ag layer from the side of a substrate when the electrode is formed on the Si substrate. CONSTITUTION:On the Si substrate 10 the Cr layer 11 about 100-1,000Angstrom thick and the Ni layer 12 about 1,000-10,000Angstrom thick are laminated and connected thereto, whereon the Ni oxidation preventing layer 13 formed of Au and having the thickness of about 100-3,000Angstrom is formed, and the laminate thus prepared is subjected to heat treatment for 30-120min at a temperature of 250-300 deg.C in the ambience of N2. At this time, Sn may also be used for the layer 13, and in this case the thickness is set to be about 100-1,000Angstrom and the laminate is subjected to heat treatment at a temperature of 300-500 deg.C in an H2 gas for the first 1-5min and, after the surface oxidized film of the layer 13 is reduced in the first treatment it is reat treated in a mixed gas containing H2 in the ratio of H2:H2=1:10 for 30- 120min After that, on to the laminate thus treated is connected the Ag layer 14. Thus, the oxidation of the Ni layer 12 is prevented.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP54172397A JPS6026292B2 (en) | 1979-12-27 | 1979-12-27 | Manufacturing method of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP54172397A JPS6026292B2 (en) | 1979-12-27 | 1979-12-27 | Manufacturing method of semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5694663A true JPS5694663A (en) | 1981-07-31 |
JPS6026292B2 JPS6026292B2 (en) | 1985-06-22 |
Family
ID=15941172
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP54172397A Expired JPS6026292B2 (en) | 1979-12-27 | 1979-12-27 | Manufacturing method of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6026292B2 (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5864036A (en) * | 1981-10-13 | 1983-04-16 | Nec Home Electronics Ltd | Manufacture of semiconductor device |
JPS58182840A (en) * | 1982-04-21 | 1983-10-25 | Matsushita Electronics Corp | Semiconductor device |
JPS62229848A (en) * | 1986-03-29 | 1987-10-08 | Toshiba Corp | Semiconductor device |
JPS63161631A (en) * | 1986-12-24 | 1988-07-05 | Nec Corp | Silicon semiconductor element |
US7842889B2 (en) | 2005-04-25 | 2010-11-30 | Hitachi Kyowa Engineering Co., Ltd. | Substrate for mounting electronic part and electronic part |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5165659U (en) * | 1974-11-18 | 1976-05-24 |
-
1979
- 1979-12-27 JP JP54172397A patent/JPS6026292B2/en not_active Expired
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5165659U (en) * | 1974-11-18 | 1976-05-24 |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5864036A (en) * | 1981-10-13 | 1983-04-16 | Nec Home Electronics Ltd | Manufacture of semiconductor device |
JPS58182840A (en) * | 1982-04-21 | 1983-10-25 | Matsushita Electronics Corp | Semiconductor device |
JPS62229848A (en) * | 1986-03-29 | 1987-10-08 | Toshiba Corp | Semiconductor device |
JPS63161631A (en) * | 1986-12-24 | 1988-07-05 | Nec Corp | Silicon semiconductor element |
US7842889B2 (en) | 2005-04-25 | 2010-11-30 | Hitachi Kyowa Engineering Co., Ltd. | Substrate for mounting electronic part and electronic part |
DE102006011232B4 (en) * | 2005-04-25 | 2012-11-08 | Hitachi Kyowa Engineering Co., Ltd. | Substrate for mounting an electronic component and electronic component |
Also Published As
Publication number | Publication date |
---|---|
JPS6026292B2 (en) | 1985-06-22 |
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