JPS5690270A - Scan-in scan-out method - Google Patents
Scan-in scan-out methodInfo
- Publication number
- JPS5690270A JPS5690270A JP16858179A JP16858179A JPS5690270A JP S5690270 A JPS5690270 A JP S5690270A JP 16858179 A JP16858179 A JP 16858179A JP 16858179 A JP16858179 A JP 16858179A JP S5690270 A JPS5690270 A JP S5690270A
- Authority
- JP
- Japan
- Prior art keywords
- scan
- scanning
- added
- data
- simultaneous scanning
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Tests Of Electronic Circuits (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
PURPOSE: To enable high-speed testing of a logic circuit by enabling simultaneous scanning-in to a plurality of flip-flop and also simultaneous scanning-out of the content thereof.
CONSTITUTION: When scanning-in and scanning-out are performed, a scan designating signal terminal SCAN "1" is added, while scan-in data is added to input terminals IN1WINn. When the scan-in designating signal terminal SCAN "1" is added, a gate 5 is opened and simultaneously gates 8-1W8-n are also opened. As the result, the data added to the input terminals IN1WINn are set in the flip-flops FF1WFFn respectively, while the data housed in FF1WFFn are taken out repectively from output terminals OUT1WOUTn. Since such a constitution enables simultaneous scanning-in to FFs in plural and simultaneous scanning-out of the content of FFs in plural, the high-speed testing of the logic circuit is made possible.
COPYRIGHT: (C)1981,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16858179A JPS5690270A (en) | 1979-12-25 | 1979-12-25 | Scan-in scan-out method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16858179A JPS5690270A (en) | 1979-12-25 | 1979-12-25 | Scan-in scan-out method |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5690270A true JPS5690270A (en) | 1981-07-22 |
Family
ID=15870701
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16858179A Pending JPS5690270A (en) | 1979-12-25 | 1979-12-25 | Scan-in scan-out method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5690270A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3709032A1 (en) * | 1986-03-22 | 1987-09-24 | Hitachi Ltd | LARGE CIRCUIT SEMICONDUCTOR DEVICE |
US4752907A (en) * | 1983-08-31 | 1988-06-21 | Amdahl Corporation | Integrated circuit scanning apparatus having scanning data lines for connecting selected data locations to an I/O terminal |
JPH0250738A (en) * | 1988-08-12 | 1990-02-20 | Fujitsu Ltd | Test system for check processing circuit |
US4922184A (en) * | 1988-08-29 | 1990-05-01 | Control Data Corporation | Apparatus and process for the simultaneous continuity sensing of multiple circuits |
-
1979
- 1979-12-25 JP JP16858179A patent/JPS5690270A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4752907A (en) * | 1983-08-31 | 1988-06-21 | Amdahl Corporation | Integrated circuit scanning apparatus having scanning data lines for connecting selected data locations to an I/O terminal |
DE3709032A1 (en) * | 1986-03-22 | 1987-09-24 | Hitachi Ltd | LARGE CIRCUIT SEMICONDUCTOR DEVICE |
JPH0250738A (en) * | 1988-08-12 | 1990-02-20 | Fujitsu Ltd | Test system for check processing circuit |
US4922184A (en) * | 1988-08-29 | 1990-05-01 | Control Data Corporation | Apparatus and process for the simultaneous continuity sensing of multiple circuits |
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