JPS5687331A - Reducing furnace for solder-treatment - Google Patents
Reducing furnace for solder-treatmentInfo
- Publication number
- JPS5687331A JPS5687331A JP16348679A JP16348679A JPS5687331A JP S5687331 A JPS5687331 A JP S5687331A JP 16348679 A JP16348679 A JP 16348679A JP 16348679 A JP16348679 A JP 16348679A JP S5687331 A JPS5687331 A JP S5687331A
- Authority
- JP
- Japan
- Prior art keywords
- furnace
- gas
- ejected
- reduced gas
- reduced
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
Abstract
PURPOSE:To uniform a hydrogen gas in the furnace by a method wherein a shielding plate is installed on the way extending from a nozzle for the reduced gas to an exhaust port of the furnace, in the reducing furnace where a reduced gas is ejected from the central part of the furnace body and a semiconductor pellet is applied a solder treatment. CONSTITUTION:A nitrogen gas is ejected from supply ports 4, 5 for the nitrogen gas, curtains are formed by the nitrogen gas at an inlet and outlet of the furnace 1 and then, such a reduced gas as the hydrogen gas is ejected from the nozzle 2 into the furnace 1. The reduced gas ejected into the furnace 1 is discharged in sequence from the exhaust ports 6, 7. At this time, if teflon sheets having an area as large as capable of covering a passage of the furnace 1 is kept hung from the ceiling of the furnace 1 in curtain-shape around the exhaust ports 6, 7, the reduced gas is hindered from moving in and as a result, the concentration of the reduced gas between the teflon sheets 9 is increased and made uniform. By applying a solder treatment in the reducing furnace in this way, a uniform soldering can be attained.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16348679A JPS5687331A (en) | 1979-12-18 | 1979-12-18 | Reducing furnace for solder-treatment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16348679A JPS5687331A (en) | 1979-12-18 | 1979-12-18 | Reducing furnace for solder-treatment |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5687331A true JPS5687331A (en) | 1981-07-15 |
Family
ID=15774775
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16348679A Pending JPS5687331A (en) | 1979-12-18 | 1979-12-18 | Reducing furnace for solder-treatment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5687331A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5866338A (en) * | 1981-10-15 | 1983-04-20 | Toshiba Corp | Semiconductor mount device |
JPS5990936A (en) * | 1982-10-08 | 1984-05-25 | ウエスターン エレクトリック カムパニー,インコーポレーテッド | Method of bonding ultrasmall electronic chip |
JPS59182532A (en) * | 1983-04-01 | 1984-10-17 | Shinkawa Ltd | Heater for bonding device |
JPS6037737A (en) * | 1983-08-11 | 1985-02-27 | Toshiba Corp | Pellet mounting apparatus |
JPS63239957A (en) * | 1987-03-27 | 1988-10-05 | Nec Corp | Manufacture of semiconductor device |
US5647740A (en) * | 1993-11-08 | 1997-07-15 | Kabushiki Kaisha Shinkawa | Lead frame baking oven |
-
1979
- 1979-12-18 JP JP16348679A patent/JPS5687331A/en active Pending
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5866338A (en) * | 1981-10-15 | 1983-04-20 | Toshiba Corp | Semiconductor mount device |
JPS5990936A (en) * | 1982-10-08 | 1984-05-25 | ウエスターン エレクトリック カムパニー,インコーポレーテッド | Method of bonding ultrasmall electronic chip |
JPS59182532A (en) * | 1983-04-01 | 1984-10-17 | Shinkawa Ltd | Heater for bonding device |
JPH0254664B2 (en) * | 1983-04-01 | 1990-11-22 | Shinkawa Kk | |
JPS6037737A (en) * | 1983-08-11 | 1985-02-27 | Toshiba Corp | Pellet mounting apparatus |
JPH0231860B2 (en) * | 1983-08-11 | 1990-07-17 | Tokyo Shibaura Electric Co | |
JPS63239957A (en) * | 1987-03-27 | 1988-10-05 | Nec Corp | Manufacture of semiconductor device |
US5647740A (en) * | 1993-11-08 | 1997-07-15 | Kabushiki Kaisha Shinkawa | Lead frame baking oven |
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