JPS5676860A - Interleaving system for memory device - Google Patents

Interleaving system for memory device

Info

Publication number
JPS5676860A
JPS5676860A JP15394279A JP15394279A JPS5676860A JP S5676860 A JPS5676860 A JP S5676860A JP 15394279 A JP15394279 A JP 15394279A JP 15394279 A JP15394279 A JP 15394279A JP S5676860 A JPS5676860 A JP S5676860A
Authority
JP
Japan
Prior art keywords
address data
memory
bits
memory bank
data bits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15394279A
Other languages
Japanese (ja)
Inventor
Toshihiko Watari
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP15394279A priority Critical patent/JPS5676860A/en
Publication of JPS5676860A publication Critical patent/JPS5676860A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To minimize the fault of a memory element, by securing such a converting method by which the physical memory addresses in the memory bank can be designated continuously to the sucessive increment of the system addresses.
CONSTITUTION: The three bits are converted into the memory bank designation bits of the memory address data bit from the lowest-rank bit of the system address data bit. Now the memory bank is set to 8, and accordingly, the memory address data bits need three of A00, A01, A02 each. Thus the system address data bits a23, a22 and a21 are converted into the A02, A01 and A00 each. For the system address data bits of a20Wa00, the bits a20 and a00 are converted into the lowest-rank bit A23 of the address data bits A2WA03 which designate the address within the memory bank and the lowest-rank bit A03 of the address data bits A23WA03 which designate the address within the memory bank respectively. In this way, the fault of the memory element is minimized.
COPYRIGHT: (C)1981,JPO&Japio
JP15394279A 1979-11-28 1979-11-28 Interleaving system for memory device Pending JPS5676860A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15394279A JPS5676860A (en) 1979-11-28 1979-11-28 Interleaving system for memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15394279A JPS5676860A (en) 1979-11-28 1979-11-28 Interleaving system for memory device

Publications (1)

Publication Number Publication Date
JPS5676860A true JPS5676860A (en) 1981-06-24

Family

ID=15573440

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15394279A Pending JPS5676860A (en) 1979-11-28 1979-11-28 Interleaving system for memory device

Country Status (1)

Country Link
JP (1) JPS5676860A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59116845A (en) * 1982-12-23 1984-07-05 Jeol Ltd Gathering and transferring method of picture data

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4943839A (en) * 1972-07-13 1974-04-25
JPS4974448A (en) * 1972-10-05 1974-07-18
JPS5010036A (en) * 1973-05-23 1975-02-01

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4943839A (en) * 1972-07-13 1974-04-25
JPS4974448A (en) * 1972-10-05 1974-07-18
JPS5010036A (en) * 1973-05-23 1975-02-01

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59116845A (en) * 1982-12-23 1984-07-05 Jeol Ltd Gathering and transferring method of picture data

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