JPS5593582A - Memory system - Google Patents

Memory system

Info

Publication number
JPS5593582A
JPS5593582A JP16523878A JP16523878A JPS5593582A JP S5593582 A JPS5593582 A JP S5593582A JP 16523878 A JP16523878 A JP 16523878A JP 16523878 A JP16523878 A JP 16523878A JP S5593582 A JPS5593582 A JP S5593582A
Authority
JP
Japan
Prior art keywords
address
logical address
bank
banks
logical
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16523878A
Other languages
Japanese (ja)
Other versions
JPS5719514B2 (en
Inventor
Takeshi Murata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16523878A priority Critical patent/JPS5593582A/en
Publication of JPS5593582A publication Critical patent/JPS5593582A/en
Publication of JPS5719514B2 publication Critical patent/JPS5719514B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE: To make access across byte boundaries possible and prevent a standby quantity for a page fault generated at an address conversion time from being extended, by converting a logical address to a physical address while causing the logical address to correspond to a prescribed bank.
CONSTITUTION: 2n-number banks BNK are interleaved in a memory unit correspondingly to lower n-number bits of logical address LA, and logical address LA is converted to a physical address for every bank by one or plural address conveters TLB having the same contents, and all banks are accessed simultaneously in respect to continuous data of an arbitrary length.
COPYRIGHT: (C)1980,JPO&Japio
JP16523878A 1978-12-31 1978-12-31 Memory system Granted JPS5593582A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16523878A JPS5593582A (en) 1978-12-31 1978-12-31 Memory system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16523878A JPS5593582A (en) 1978-12-31 1978-12-31 Memory system

Publications (2)

Publication Number Publication Date
JPS5593582A true JPS5593582A (en) 1980-07-16
JPS5719514B2 JPS5719514B2 (en) 1982-04-22

Family

ID=15808480

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16523878A Granted JPS5593582A (en) 1978-12-31 1978-12-31 Memory system

Country Status (1)

Country Link
JP (1) JPS5593582A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58159286A (en) * 1982-03-17 1983-09-21 Nec Corp Control system for storage device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58159286A (en) * 1982-03-17 1983-09-21 Nec Corp Control system for storage device

Also Published As

Publication number Publication date
JPS5719514B2 (en) 1982-04-22

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