JPS5676821A - Power supply method of storage device - Google Patents

Power supply method of storage device

Info

Publication number
JPS5676821A
JPS5676821A JP16168780A JP16168780A JPS5676821A JP S5676821 A JPS5676821 A JP S5676821A JP 16168780 A JP16168780 A JP 16168780A JP 16168780 A JP16168780 A JP 16168780A JP S5676821 A JPS5676821 A JP S5676821A
Authority
JP
Japan
Prior art keywords
reading
writing
power
data
control part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16168780A
Other languages
Japanese (ja)
Other versions
JPS5729729B2 (en
Inventor
Mutsuo Sugawara
Keiji Namimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP16168780A priority Critical patent/JPS5676821A/en
Publication of JPS5676821A publication Critical patent/JPS5676821A/en
Publication of JPS5729729B2 publication Critical patent/JPS5729729B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Power Sources (AREA)
  • Static Random-Access Memory (AREA)
  • Direct Current Feeding And Distribution (AREA)

Abstract

PURPOSE: To reduce the amount of average power consumption, by supplying the power only when necessary for the reading or writing of the data and at the same time supplying the necessary power only to the chip which performs the reading or writing among several units of the memory chips.
CONSTITUTION: The reading or writing command given from the processor 32 is received via the memory control part 35. In addition to the above action, the memory chips 211 and 212 write the data into the area designated by the address signal sent from the data line 310 and also read the data out of the designated area. The power supply control part 36 supplies the power only to these ships 211 and 212 which perform the reading and writing actions by the data control signals C1 and C2 supplied from the processor 32. Then the address signal is applied to the control part 36 from the memory control part 35, and the power is supplied the memory chip via the power supply line 41 during the writing or reading address. Thus the amount of average power consumption can be reduced.
COPYRIGHT: (C)1981,JPO&Japio
JP16168780A 1980-11-17 1980-11-17 Power supply method of storage device Granted JPS5676821A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16168780A JPS5676821A (en) 1980-11-17 1980-11-17 Power supply method of storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16168780A JPS5676821A (en) 1980-11-17 1980-11-17 Power supply method of storage device

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP3318376A Division JPS52116119A (en) 1976-03-26 1976-03-26 Power source supply system for memory unit

Publications (2)

Publication Number Publication Date
JPS5676821A true JPS5676821A (en) 1981-06-24
JPS5729729B2 JPS5729729B2 (en) 1982-06-24

Family

ID=15739937

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16168780A Granted JPS5676821A (en) 1980-11-17 1980-11-17 Power supply method of storage device

Country Status (1)

Country Link
JP (1) JPS5676821A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58501061A (en) * 1981-06-29 1983-06-30 松下電器産業株式会社 Computer with extended address function
JPS59135370A (en) * 1983-01-24 1984-08-03 Shin Kobe Electric Mach Co Ltd Wave form observing apparatus
JPS6430422A (en) * 1987-07-23 1989-02-01 Fujitsu Ltd Power source controller
US7376848B2 (en) 1997-06-27 2008-05-20 Broadcom Corporation Battery powered device with dynamic power and performance management

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50119542A (en) * 1974-03-01 1975-09-19

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50119542A (en) * 1974-03-01 1975-09-19

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58501061A (en) * 1981-06-29 1983-06-30 松下電器産業株式会社 Computer with extended address function
JPS59135370A (en) * 1983-01-24 1984-08-03 Shin Kobe Electric Mach Co Ltd Wave form observing apparatus
JPS6430422A (en) * 1987-07-23 1989-02-01 Fujitsu Ltd Power source controller
US7376848B2 (en) 1997-06-27 2008-05-20 Broadcom Corporation Battery powered device with dynamic power and performance management
US7900067B2 (en) 1997-06-27 2011-03-01 Broadcom Corporation Battery powered device with dynamic and performance management
US8504852B2 (en) 1997-06-27 2013-08-06 Broadcom Corporation Battery powered device with dynamic power and performance management

Also Published As

Publication number Publication date
JPS5729729B2 (en) 1982-06-24

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