JPS5670655A - Manufacture of electronic circuit mounting device - Google Patents
Manufacture of electronic circuit mounting deviceInfo
- Publication number
- JPS5670655A JPS5670655A JP14842179A JP14842179A JPS5670655A JP S5670655 A JPS5670655 A JP S5670655A JP 14842179 A JP14842179 A JP 14842179A JP 14842179 A JP14842179 A JP 14842179A JP S5670655 A JPS5670655 A JP S5670655A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- electronic part
- substrate
- window
- coated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
- H01L21/4839—Assembly of a flat lead with an insulating support, e.g. for TAB
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9212—Sequential connecting processes
- H01L2224/92142—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92144—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14842179A JPS5670655A (en) | 1979-11-15 | 1979-11-15 | Manufacture of electronic circuit mounting device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14842179A JPS5670655A (en) | 1979-11-15 | 1979-11-15 | Manufacture of electronic circuit mounting device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5670655A true JPS5670655A (en) | 1981-06-12 |
JPS5758797B2 JPS5758797B2 (ja) | 1982-12-11 |
Family
ID=15452412
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14842179A Granted JPS5670655A (en) | 1979-11-15 | 1979-11-15 | Manufacture of electronic circuit mounting device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5670655A (ja) |
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0171662A2 (en) * | 1984-08-13 | 1986-02-19 | International Business Machines Corporation | Method of fabricating a chip interposer |
US4724611A (en) * | 1985-08-23 | 1988-02-16 | Nec Corporation | Method for producing semiconductor module |
US4749120A (en) * | 1986-12-18 | 1988-06-07 | Matsushita Electric Industrial Co., Ltd. | Method of connecting a semiconductor device to a wiring board |
US4945980A (en) * | 1988-09-09 | 1990-08-07 | Nec Corporation | Cooling unit |
US4975766A (en) * | 1988-08-26 | 1990-12-04 | Nec Corporation | Structure for temperature detection in a package |
US5014777A (en) * | 1988-09-20 | 1991-05-14 | Nec Corporation | Cooling structure |
US5023695A (en) * | 1988-05-09 | 1991-06-11 | Nec Corporation | Flat cooling structure of integrated circuit |
US5036384A (en) * | 1987-12-07 | 1991-07-30 | Nec Corporation | Cooling system for IC package |
JP2013514637A (ja) * | 2009-12-18 | 2013-04-25 | シュバイツァー エレクトロニク アーゲー | 導体構造要素及び導体構造要素を製造するための方法 |
JP2014086246A (ja) * | 2012-10-23 | 2014-05-12 | Nippon Mektron Ltd | バスバー付きフレキシブルプリント配線板およびその製造方法、並びにバッテリシステム |
EP4020533A3 (en) * | 2020-12-25 | 2022-09-21 | Shinko Electric Industries Co., Ltd. | Semiconductor device and method of manufacturing same |
-
1979
- 1979-11-15 JP JP14842179A patent/JPS5670655A/ja active Granted
Cited By (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0171662A2 (en) * | 1984-08-13 | 1986-02-19 | International Business Machines Corporation | Method of fabricating a chip interposer |
US4724611A (en) * | 1985-08-23 | 1988-02-16 | Nec Corporation | Method for producing semiconductor module |
US4749120A (en) * | 1986-12-18 | 1988-06-07 | Matsushita Electric Industrial Co., Ltd. | Method of connecting a semiconductor device to a wiring board |
US5036384A (en) * | 1987-12-07 | 1991-07-30 | Nec Corporation | Cooling system for IC package |
US5023695A (en) * | 1988-05-09 | 1991-06-11 | Nec Corporation | Flat cooling structure of integrated circuit |
US4975766A (en) * | 1988-08-26 | 1990-12-04 | Nec Corporation | Structure for temperature detection in a package |
US4945980A (en) * | 1988-09-09 | 1990-08-07 | Nec Corporation | Cooling unit |
US5014777A (en) * | 1988-09-20 | 1991-05-14 | Nec Corporation | Cooling structure |
JP2013514637A (ja) * | 2009-12-18 | 2013-04-25 | シュバイツァー エレクトロニク アーゲー | 導体構造要素及び導体構造要素を製造するための方法 |
JP2014086246A (ja) * | 2012-10-23 | 2014-05-12 | Nippon Mektron Ltd | バスバー付きフレキシブルプリント配線板およびその製造方法、並びにバッテリシステム |
US10084211B2 (en) | 2012-10-23 | 2018-09-25 | Nippon Mektron, Ltd. | Flexible printed circuit with bus bars, manufacturing method thereof, and battery system |
EP4020533A3 (en) * | 2020-12-25 | 2022-09-21 | Shinko Electric Industries Co., Ltd. | Semiconductor device and method of manufacturing same |
US11742272B2 (en) | 2020-12-25 | 2023-08-29 | Shinko Electric Industries Co., Ltd. | Semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
JPS5758797B2 (ja) | 1982-12-11 |
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