JPS5661158A - Cmos random access memory - Google Patents

Cmos random access memory

Info

Publication number
JPS5661158A
JPS5661158A JP13805879A JP13805879A JPS5661158A JP S5661158 A JPS5661158 A JP S5661158A JP 13805879 A JP13805879 A JP 13805879A JP 13805879 A JP13805879 A JP 13805879A JP S5661158 A JPS5661158 A JP S5661158A
Authority
JP
Japan
Prior art keywords
channel transistor
constructed
inverters
random access
access memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13805879A
Other languages
Japanese (ja)
Inventor
Tatsuji Asakawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP13805879A priority Critical patent/JPS5661158A/en
Publication of JPS5661158A publication Critical patent/JPS5661158A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices

Landscapes

  • Static Random-Access Memory (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To obtain a high density cell by a method wherein C-MOS inverters with the same crystalline Si are used for gate wiring and wiring between drains when construcing a memory cell with C-MOSIC, and the inverters are held in an X shape. CONSTITUTION:A CMOS.IC is constructed of source regions 21 and 24, dran regions 23 and 26, and gate regions 22 and 25 as usual, but wiring connected to drain layers 23 and 26, and simultaneously connecting them together is conducted by the use of the same polycrystalline Si layer 28 as those of gates 22 and 25. Next, a COMS inverter is constructed of a P channel transistor 41, N channel transistor 42 and forward diode 43 using the IC, while another COMS inverter is constructed of a P channel transistor 44, N channel transistor 45 and forward diode 46. These inverters are held in an X shape.
JP13805879A 1979-10-25 1979-10-25 Cmos random access memory Pending JPS5661158A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13805879A JPS5661158A (en) 1979-10-25 1979-10-25 Cmos random access memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13805879A JPS5661158A (en) 1979-10-25 1979-10-25 Cmos random access memory

Publications (1)

Publication Number Publication Date
JPS5661158A true JPS5661158A (en) 1981-05-26

Family

ID=15212990

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13805879A Pending JPS5661158A (en) 1979-10-25 1979-10-25 Cmos random access memory

Country Status (1)

Country Link
JP (1) JPS5661158A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02141991A (en) * 1988-11-21 1990-05-31 Nec Corp Semiconductor storage circuit and semiconductor memory
US5770892A (en) * 1989-01-18 1998-06-23 Sgs-Thomson Microelectronics, Inc. Field effect device with polycrystalline silicon channel
US6140684A (en) * 1997-06-24 2000-10-31 Stmicroelectronic, Inc. SRAM cell structure with dielectric sidewall spacers and drain and channel regions defined along sidewall spacers

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02141991A (en) * 1988-11-21 1990-05-31 Nec Corp Semiconductor storage circuit and semiconductor memory
US5770892A (en) * 1989-01-18 1998-06-23 Sgs-Thomson Microelectronics, Inc. Field effect device with polycrystalline silicon channel
US6140684A (en) * 1997-06-24 2000-10-31 Stmicroelectronic, Inc. SRAM cell structure with dielectric sidewall spacers and drain and channel regions defined along sidewall spacers

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