JPS5656663A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5656663A
JPS5656663A JP13313279A JP13313279A JPS5656663A JP S5656663 A JPS5656663 A JP S5656663A JP 13313279 A JP13313279 A JP 13313279A JP 13313279 A JP13313279 A JP 13313279A JP S5656663 A JPS5656663 A JP S5656663A
Authority
JP
Japan
Prior art keywords
type
substrate
region
impressed
monolithic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13313279A
Other languages
Japanese (ja)
Other versions
JPH0127586B2 (en
Inventor
Masao Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP13313279A priority Critical patent/JPS5656663A/en
Publication of JPS5656663A publication Critical patent/JPS5656663A/en
Publication of JPH0127586B2 publication Critical patent/JPH0127586B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0229—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures

Abstract

PURPOSE:To obtain a monolithic IC whose parasitic capacity is small and which has high switching speed by impressing a bias voltage on a substrate and a resistance insulation layer composing the bipolar-type IC by voltage generating means formed on the same chip. CONSTITUTION:In the P type semiconductor substrate 102 is provided a transistor 104 having an N type collector region, a P type base region and an N<+> type emitter region, among which the subsequent one is positioned in the preceding one. Moreover, a P type resistance region insulated by an N type region 103 is formed in the substrate 102, whereby the bipolar-type IC is prepared. Next, on the substrate 102 and the N type region 103 is impressed the bias voltage from terminals 105 and 106 respectively. On the occasion, the voltage generating means is not provided outside, but formed within the same substrate 102. That is, a common oscillator 201 and rectifiers 202 and 203 for each are formed within the substrate 102 and the outputs thereof are impressed on the monolithic IC substrate 204 which is the substrate 102 and also on the resistance insulation layer 205 which is the region 103.
JP13313279A 1979-10-16 1979-10-16 Semiconductor device Granted JPS5656663A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13313279A JPS5656663A (en) 1979-10-16 1979-10-16 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13313279A JPS5656663A (en) 1979-10-16 1979-10-16 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS5656663A true JPS5656663A (en) 1981-05-18
JPH0127586B2 JPH0127586B2 (en) 1989-05-30

Family

ID=15097517

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13313279A Granted JPS5656663A (en) 1979-10-16 1979-10-16 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5656663A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4509250A (en) * 1982-09-20 1985-04-09 Itt Industries, Inc. Process for manufacturing a monolithic integrated circuit comprising at least one bipolar planar transistor
JPS63257260A (en) * 1987-04-14 1988-10-25 Nec Corp Mos type semiconductor device
US4898837A (en) * 1987-11-19 1990-02-06 Sanyo Electric Co., Ltd. Method of fabricating a semiconductor integrated circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4960181A (en) * 1972-10-06 1974-06-11

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4960181A (en) * 1972-10-06 1974-06-11

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4509250A (en) * 1982-09-20 1985-04-09 Itt Industries, Inc. Process for manufacturing a monolithic integrated circuit comprising at least one bipolar planar transistor
JPS63257260A (en) * 1987-04-14 1988-10-25 Nec Corp Mos type semiconductor device
US4898837A (en) * 1987-11-19 1990-02-06 Sanyo Electric Co., Ltd. Method of fabricating a semiconductor integrated circuit

Also Published As

Publication number Publication date
JPH0127586B2 (en) 1989-05-30

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