JPS5650537A - Formation of multilayered wiring for semiconductor device - Google Patents

Formation of multilayered wiring for semiconductor device

Info

Publication number
JPS5650537A
JPS5650537A JP12753879A JP12753879A JPS5650537A JP S5650537 A JPS5650537 A JP S5650537A JP 12753879 A JP12753879 A JP 12753879A JP 12753879 A JP12753879 A JP 12753879A JP S5650537 A JPS5650537 A JP S5650537A
Authority
JP
Japan
Prior art keywords
film
interlayer insulating
insulating film
lower wiring
deposited
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12753879A
Other languages
Japanese (ja)
Inventor
Yoshihiko Hirose
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP12753879A priority Critical patent/JPS5650537A/en
Publication of JPS5650537A publication Critical patent/JPS5650537A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To prevent the corrosion of the lower wiring layer in the case multilayered wirings of two or more layers are formed, by depositing a metal film which can withstand etching liquid for an interlayer insulating film on the boundary surface between the lower wiring film and the interlayer insulating film. CONSTITUTION:An oxide insulating film 3 having a hole on an impurity region 2 is formed on a silicon substrate 1. Then, an aluminum film is deposited, and the first lower wiring film 4 is formed. On said film 4, is deposited a metal 5 such as chromium, molybdenum, tungsten, titanium, and the like which can withstand the etching liquid for the interlayer insulating film 6. Then, an SiO2 film which is to become the interlayer insulating film 6 by a reactive sputtering method or a CVD method, and an opening 7 for a through hole is provided at a desired region by a normal method. Finally, an aluminum film 8 which is to become the second wiring metal film is deposited. In this constitution, the lower wiring film 4 is not corroded by fluoric acid which is the etching liquid for the SiO2 film.
JP12753879A 1979-10-01 1979-10-01 Formation of multilayered wiring for semiconductor device Pending JPS5650537A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12753879A JPS5650537A (en) 1979-10-01 1979-10-01 Formation of multilayered wiring for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12753879A JPS5650537A (en) 1979-10-01 1979-10-01 Formation of multilayered wiring for semiconductor device

Publications (1)

Publication Number Publication Date
JPS5650537A true JPS5650537A (en) 1981-05-07

Family

ID=14962483

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12753879A Pending JPS5650537A (en) 1979-10-01 1979-10-01 Formation of multilayered wiring for semiconductor device

Country Status (1)

Country Link
JP (1) JPS5650537A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61159750A (en) * 1984-12-31 1986-07-19 Sony Corp Semiconductor device and manufacture thereof
US6836299B2 (en) * 2001-02-12 2004-12-28 Samsung Electronics Co., Ltd. TFT LCD device having multi-layered pixel electrodes

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61159750A (en) * 1984-12-31 1986-07-19 Sony Corp Semiconductor device and manufacture thereof
US6836299B2 (en) * 2001-02-12 2004-12-28 Samsung Electronics Co., Ltd. TFT LCD device having multi-layered pixel electrodes
USRE41927E1 (en) * 2001-02-12 2010-11-16 Samsung Electronics Co., Ltd. TFT LCD device having multi-layered pixel electrodes

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