JPH088248A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH088248A
JPH088248A JP13438294A JP13438294A JPH088248A JP H088248 A JPH088248 A JP H088248A JP 13438294 A JP13438294 A JP 13438294A JP 13438294 A JP13438294 A JP 13438294A JP H088248 A JPH088248 A JP H088248A
Authority
JP
Japan
Prior art keywords
film
wiring
sog
refractory metal
inorganic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13438294A
Other languages
Japanese (ja)
Inventor
Takashi Nagashima
隆 長嶋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP13438294A priority Critical patent/JPH088248A/en
Publication of JPH088248A publication Critical patent/JPH088248A/en
Pending legal-status Critical Current

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To improve the reliability in wiring by suppressing the erosion of a lower-layer wiring without reducing the film quality when baking a thick-film inorganic SOG film. CONSTITUTION:A process for forming wirings 2 (2A and 2B) where at least a surface-layer part consists of refractory metal or its alloy are formed on a semiconductor substrate 1 and a process for applying inorganic spin-on-glass (SOG) film 4, where a molecular end is sealed with proton and silazane boning exists in a skeleton by covering wiring, to the semiconductor substrate 1 and for baking the inorganic SOG film 4 are provided. Refractory metal is tungsten or titan and its alloy is titanium nitride.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体装置の製造方法に
係り,特に厚膜無機のSOG(スピンオングラス) 膜を用い
て基板表面を平坦化する際の配線方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device manufacturing method, and more particularly to a wiring method for planarizing a substrate surface using a thick inorganic SOG (spin on glass) film.

【0002】[0002]

【従来の技術】LSI の製造プロセスにおいて, 基板上に
形成された配線層による段差をなくするための平坦化に
は, 従来, テトラアルコキシシランを原料とした無機SO
G 膜やメチルトリアルコキシシランを原料とした有機SO
G 膜が用いられてきたが,近年, クラック耐性及び酸素
プラズマ耐性を両立させるSOG 膜として,次式に示され
る分子末端がプロトンで封止され,骨格中にシラザン結
合を持つ無機SOG 膜が実用化されている。また, 従来の
無機SOG 膜は平坦化に必要な厚膜化が困難であったが,
この無機SOG 膜は厚膜形成が可能なため厚膜無機SOG 膜
とも呼ばれる。
2. Description of the Related Art In the manufacturing process of LSIs, conventionally, inorganic flattening using tetraalkoxysilane as a raw material has been used for flattening to eliminate steps due to wiring layers formed on a substrate.
Organic SO made from G film and methyltrialkoxysilane
The G film has been used, but in recent years, as an SOG film that achieves both crack resistance and oxygen plasma resistance, an inorganic SOG film having a silazane bond in the skeleton with a molecular end represented by the formula shown below is practically used. Has been converted. Moreover, it was difficult to increase the thickness of the conventional inorganic SOG film required for planarization,
Since this inorganic SOG film can be formed into a thick film, it is also called a thick film inorganic SOG film.

【0003】[0003]

【化1】 この厚膜無機SOG 膜は従来のSOG 膜と異なり,焼成時に
酸化させることにより緻密で良質な酸化膜に変換でき
る。この焼成は, 水蒸気雰囲気中もしくは酸素雰囲気中
で行うことが望ましい。
Embedded image Unlike conventional SOG films, this thick-film inorganic SOG film can be converted into a dense and high-quality oxide film by oxidizing it during firing. It is desirable that this firing be performed in a steam atmosphere or an oxygen atmosphere.

【0004】ところが,上記の厚膜無機SOG 膜を用いて
平坦化を行う場合, SOG 膜焼成時の水分により,下層の
アルミニウム(Al)配線に陥没 (浸食) が起こり, 配線の
信頼性を低下させていた。
However, when the above-mentioned thick inorganic SOG film is used for planarization, moisture at the time of baking the SOG film causes depression (erosion) in the underlying aluminum (Al) wiring, which lowers the reliability of the wiring. I was letting it.

【0005】図3(A),(B) は従来例の説明図である。図
3(A) は表面に絶縁膜が被着された半導体基板 1の上に
厚さ 1μmのAl配線5が形成され,その上に厚さ 0.6μ
mのCVD SiO2膜 3を成長し, 次いで平坦化膜として段差
上部での厚さが 0.5μmの厚膜無機SOG 膜4 を塗布し,
焼成する。
3A and 3B are explanatory views of a conventional example. In Fig. 3 (A), an Al wiring 5 with a thickness of 1 µm is formed on a semiconductor substrate 1 having an insulating film deposited on the surface, and a thickness of 0.6 µ is formed on the Al wiring 5.
m CVD SiO 2 film 3 is grown, and then a thick inorganic SOG film 4 having a thickness of 0.5 μm on the step is applied as a flattening film.
Bake.

【0006】この際の焼成条件は, 水蒸気雰囲気中で 4
50℃, 30分間の加熱を行う。この高温焼成により,SOG
膜より水分が発生して, 図3(B) の斜視図に示されるよ
うにAl配線に浸食箇所が多数発生する。
The firing conditions at this time are as follows:
Heat at 50 ℃ for 30 minutes. By this high temperature firing, SOG
Water is generated from the film, and many erosion points are generated in the Al wiring as shown in the perspective view of FIG. 3 (B).

【0007】[0007]

【発明が解決しようとする課題】Al配線の浸食防止策と
して, 焼成を低温化または短時間化して焼成時の水分及
びストレスの発生を抑制する方法がある。
As a measure to prevent erosion of Al wiring, there is a method of suppressing the generation of moisture and stress during baking by lowering the baking temperature or shortening the baking time.

【0008】しかし,本発明は前記のように酸化を促進
することで良質の被膜を得ているので,このような焼成
方法では膜質を低下させることになる。本発明は, SOG
膜の焼成時にその膜質を低下させることなく,下層配線
の浸食を抑制し,配線の信頼性を向上させることを目的
とする。
However, according to the present invention, since a good quality film is obtained by promoting the oxidation as described above, the film quality is deteriorated by such a baking method. The present invention is based on SOG
The purpose of the present invention is to suppress the erosion of the lower layer wiring and improve the reliability of the wiring without deteriorating the quality of the film when it is baked.

【0009】[0009]

【課題を解決するための手段】上記課題の解決は, 1)半導体基板 1上に少なくとも表層部がリフラクトリ
メタルまたはその合金からなる配線 2 ; 2A,2Bを形成す
る工程と,該半導体基板 1上に該配線を覆って分子末端
がプロトンで封止され且つ骨格中にシラザン結合を持つ
無機スピンオングラス(SOG) 膜 4を塗布し,該無機SOG
膜 4を焼成する工程とを有する半導体装置の製造方法,
あるいは 2)前記リフラクトリメタルがタングステン, またはチ
タンであり, その合金が窒化チタンである前記1記載の
半導体装置の製造方法により達成される。
Means for Solving the Problems To solve the above problems, 1) a step of forming wiring 2; 2A, 2B having at least a surface layer made of refractory metal or an alloy thereof on a semiconductor substrate 1, and the semiconductor substrate 1 An inorganic spin-on-glass (SOG) film 4 which covers the wiring and whose molecular ends are sealed with protons and has a silazane bond in the skeleton is applied to the top of the inorganic SOG
A method for manufacturing a semiconductor device having a step of baking the film 4,
Alternatively, 2) it is achieved by the method for manufacturing a semiconductor device according to the above 1, wherein the refractory metal is tungsten or titanium and the alloy thereof is titanium nitride.

【0010】[0010]

【作用】本発明は,SOG 膜の下層配線の少なくとも表層
部に耐蝕性の高いリフラクトリメタルを用いることによ
り, SOG 膜の焼成時に生成する水分により該配線が浸食
されるのを防止している。
The present invention prevents the wiring from being corroded by the water generated during the firing of the SOG film by using refractory metal having high corrosion resistance at least in the surface layer of the lower wiring of the SOG film. .

【0011】すなわち, リフラクトリメタルとして, タ
ングステン(W) や, チタン(Ti)あるいはその合金(TiN:
窒化チタン) 等を配線層として用いるか, またはAl配線
の表層部に被着することにより配線の浸食を防止してい
る。
That is, as the refractory metal, tungsten (W), titanium (Ti) or its alloy (TiN:
Corrosion of the wiring is prevented by using (titanium nitride) or the like as the wiring layer or by coating the surface layer of the Al wiring.

【0012】本発明において,特にリフラクトリメタル
として, タングステンや, チタンが用いられる理由は,
いずれも耐蝕性が優れていることは勿論であるが,タン
グステンは選択およびブランケット気相成長技術が確立
され,チタン及び窒化チタンは従来よりスパッタ法によ
り容易に成膜が可能なためである。特に,窒化チタンは
グルーレイヤとしても,また高導電率を有する点でも有
効である。これらは,既存の技術を利用できることによ
り信頼性が保障できるからである。
In the present invention, the reason why tungsten or titanium is used as the refractory metal is
This is because all of them are excellent in corrosion resistance, but selection of tungsten and blanket vapor phase growth technology have been established, and titanium and titanium nitride can be easily formed by a sputtering method as compared with conventional methods. In particular, titanium nitride is effective as a glue layer and also has a high conductivity. This is because reliability can be guaranteed by using existing technology.

【0013】[0013]

【実施例】図1(A),(B) は本発明の実施例の断面図であ
る。図1(A) は表面に絶縁膜が被着された半導体基板 1
の上に厚さ 1μmのW 配線2を形成し,その上に層間絶
縁膜として厚さ 0.6μmの気相成長による酸化シリコン
(CVD SiO2 ) 膜 3を成長し, 次いで平坦化膜として段差
上部での厚さ 0.5μmの厚膜無機SOG 膜4 を回転塗布
し,焼成する。
1 (A) and 1 (B) are cross-sectional views of an embodiment of the present invention. Figure 1 (A) shows a semiconductor substrate with an insulating film deposited on the surface 1
A 1 μm-thick W wiring 2 is formed on top of it, and a 0.6 μm-thick silicon oxide film is formed on top of it as an interlayer insulating film.
A (CVD SiO 2 ) film 3 is grown, and then a thick inorganic SOG film 4 having a thickness of 0.5 μm is formed on the step as a flattening film by spin coating and baking.

【0014】焼成条件は, 水蒸気雰囲気中, もしくは酸
素雰囲気中で 430〜450 ℃の温度で約30分間の加熱を行
う。ここで,W 配線 2は,基板上に六弗化タングステン
を用いて気相成長し,次いで, 通常の光リソグラフィ技
術を用いてパターニングして形成する。
The firing conditions are heating in a steam atmosphere or an oxygen atmosphere at a temperature of 430 to 450 ° C. for about 30 minutes. Here, the W wiring 2 is formed by vapor-phase growth of tungsten hexafluoride on the substrate, and then patterning using ordinary photolithography technology.

【0015】図1(B) は表面に絶縁膜が被着された半導
体基板 1の上に積層構造の配線として厚さ 1μmのAl配
線2Aと厚さ 0.1μmのW 配線2Bを形成し,その上に層間
絶縁膜として厚さ 0.6μmのCVD SiO2膜 3を回転成長
し, 次いで平坦化膜として段差上部での厚さ 0.5μmの
厚膜無機SOG 膜4 を回転塗布し,焼成する。
In FIG. 1B, an Al wiring 2A having a thickness of 1 μm and a W wiring 2B having a thickness of 0.1 μm are formed as wiring of a laminated structure on a semiconductor substrate 1 having an insulating film deposited on the surface thereof. A 0.6 μm-thick CVD SiO 2 film 3 is spin-grown on top as an interlayer insulating film, and then a 0.5 μm-thick inorganic SOG film 4 with a thickness of 0.5 μm is spin-coated on the step as a flattening film and baked.

【0016】焼成条件は, 図1(A) の実施例と同じであ
る。ここで,Al配線2AとW 配線2Bの積層配線は,基板上
にスパッタまたは蒸着により基板上全面にAlを成膜し,
その上全面にに六弗化タングステンを用いて Wを気相成
長し,次いで, Al/W積層膜を通常の光リソグラフィ技術
を用いてパターニングして形成する。
The firing conditions are the same as in the embodiment of FIG. 1 (A). Here, for the laminated wiring of the Al wiring 2A and the W wiring 2B, Al is deposited on the entire surface of the substrate by sputtering or vapor deposition,
W is vapor-deposited on the entire surface by using tungsten hexafluoride, and then an Al / W laminated film is formed by patterning using ordinary photolithography technology.

【0017】上記のいずれの実施例においても,配線の
浸食は全く認められなかった。実施例でリフラクトリメ
タルとしてW を用いたが, これの代わりにTiやその合金
TiN 等を用いても本発明の効果は変わらない。
No erosion of the wiring was observed in any of the above examples. In the examples, W was used as the refractory metal, but instead of this, Ti and its alloys were used.
Even if TiN or the like is used, the effect of the present invention does not change.

【0018】図2は本発明の効果を示す図である。図
は,配線の浸食発生箇所の発生数の配線幅依存性を示
す。下記の配線材料で, 配線形成後に気相成長法で酸化
シリコン膜を成長し,その上に無機SOG 膜を塗布し,水
蒸気雰囲気中で焼成した。配線の浸食発生箇所の発生数
は目視により計測した。
FIG. 2 is a diagram showing the effect of the present invention. The figure shows the dependence of the number of erosion points on the wiring width. After forming the wiring with the following wiring materials, a silicon oxide film was grown by the vapor phase epitaxy method, an inorganic SOG film was applied on it, and baked in a steam atmosphere. The number of erosion points on the wiring was visually measured.

【0019】 Al配線のみ (厚さ 1μm) (従来例) W 配線のみ (厚さ 1μm) (実施例1) Al配線 (厚さ 1μm) 上にW 膜 (厚さ 0.1μm) を
被着した積層配線構造(実施例1) 図示されるように, の条件にのみ浸食の発生が確認さ
れ, 配線幅が狭くなるほどその傾向は大きくなる。
Al wiring only (thickness 1 μm) (conventional example) W wiring only (thickness 1 μm) (Example 1) W wiring (thickness 0.1 μm) laminated on Al wiring (thickness 1 μm) Wiring structure (Example 1) As shown in the figure, the occurrence of erosion was confirmed only under the condition of, and the tendency becomes larger as the wiring width becomes narrower.

【0020】なお,の積層配線構造では上層のW 膜を
剥離して下層のAl膜のみにして, 同様の焼成を行った
が, 浸食の発生は起こらなかった。これはW 膜を剥離し
ても焼成処理により下層のAl膜の表面がW と合金化され
ているためと思われる。
In the laminated wiring structure, the upper layer W film was peeled off and only the lower layer Al film was formed, and the same baking was performed, but no erosion occurred. This is probably because even if the W film is peeled off, the surface of the underlying Al film is alloyed with W by the baking treatment.

【0021】この結果より,平坦化膜として, 分子末端
がプロトンで封止され,骨格中にシラザン結合を持つSO
G 膜を用いる場合, 下層の配線構造をリフラクトリメタ
ルを単独で, または積層配線の最上層に用いることによ
り, SOG 焼成時の配線の浸食は抑制されることがわか
る。
From these results, as a flattening film, the SO having a silazane bond in the skeleton whose molecular ends are sealed with protons
When the G film is used, it can be seen that the erosion of the wiring during SOG firing is suppressed by using the lower wiring structure of refractory metal alone or as the uppermost layer of the laminated wiring.

【0022】本発明では,リフラクトリメタルとして,
一般的なタングステン,チタン,窒化チタンを用いた
が,この他にモリブデン,タンタル,ニッケル,コバル
ト,ネオビウム,ハフニウム等があり,その合金として
はチタンタングステン等があり,これらを用いても同等
の効果がある。
In the present invention, as the refractory metal,
Although general tungsten, titanium, and titanium nitride were used, in addition to them, there are molybdenum, tantalum, nickel, cobalt, neobium, hafnium, etc., and their alloys include titanium tungsten, etc. There is.

【0023】[0023]

【発明の効果】本発明によれば,SOG 膜の焼成時にその
膜質を低下させることなく,下層配線の浸食を抑制し,
配線の信頼性を向上できる。
According to the present invention, the erosion of the lower layer wiring is suppressed without deteriorating the quality of the SOG film during firing.
The reliability of wiring can be improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の実施例の断面図FIG. 1 is a sectional view of an embodiment of the present invention.

【図2】 本発明の効果を示す図FIG. 2 is a diagram showing the effect of the present invention.

【図3】 従来例の説明図FIG. 3 is an explanatory diagram of a conventional example.

【符号の説明】[Explanation of symbols]

1 半導体基板 2 W 配線 2A 積層配線の下層Al膜 2B 積層配線の上層W 膜 3 CVD SiO2膜 4 厚膜無機SOG 膜 5 Al配線1 Semiconductor substrate 2 W wiring 2A Lower layer Al film of laminated wiring 2B Upper layer W film of laminated wiring 3 CVD SiO 2 film 4 Thick inorganic SOG film 5 Al wiring

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 半導体基板(1) 上に少なくとも表層部が
リフラクトリメタルまたはその合金からなる配線(2),(2
A,2B) を形成する工程と,該半導体基板(1) 上に該配線
を覆って分子末端がプロトンで封止され且つ骨格中にシ
ラザン結合を持つ無機スピンオングラス(SOG) 膜(4)を
塗布し,該無機SOG 膜(4)を焼成する工程とを有するこ
とを特徴とする半導体装置の製造方法。
1. Wirings (2), (2) at least a surface layer portion of which is made of refractory metal or an alloy thereof on a semiconductor substrate (1).
A, 2B), and an inorganic spin-on-glass (SOG) film (4) that covers the wiring on the semiconductor substrate (1) and whose molecular ends are sealed with protons and has a silazane bond in the skeleton. A step of applying and firing the inorganic SOG film (4).
【請求項2】 前記リフラクトリメタルがタングステ
ン, またはチタンであり, その合金が窒化チタンである
ことを特徴とする請求項1記載の半導体装置の製造方
法。
2. The method of manufacturing a semiconductor device according to claim 1, wherein the refractory metal is tungsten or titanium, and the alloy thereof is titanium nitride.
JP13438294A 1994-06-16 1994-06-16 Manufacture of semiconductor device Pending JPH088248A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13438294A JPH088248A (en) 1994-06-16 1994-06-16 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13438294A JPH088248A (en) 1994-06-16 1994-06-16 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH088248A true JPH088248A (en) 1996-01-12

Family

ID=15127094

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13438294A Pending JPH088248A (en) 1994-06-16 1994-06-16 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH088248A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6074939A (en) * 1997-02-27 2000-06-13 Nec Corporation Method for fabricating semiconductor device
US6191002B1 (en) 1998-04-27 2001-02-20 Nec Corporation Method of forming trench isolation structure
US6767641B1 (en) * 2000-04-25 2004-07-27 Clariant Finance (Bvi) Limited Method for sealing fine groove with siliceous material and substrate having siliceous coating formed thereon

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6074939A (en) * 1997-02-27 2000-06-13 Nec Corporation Method for fabricating semiconductor device
US6191002B1 (en) 1998-04-27 2001-02-20 Nec Corporation Method of forming trench isolation structure
US6767641B1 (en) * 2000-04-25 2004-07-27 Clariant Finance (Bvi) Limited Method for sealing fine groove with siliceous material and substrate having siliceous coating formed thereon

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