JP3914281B2 - Manufacturing method of semiconductor integrated circuit device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor integrated circuit device and a manufacturing technique thereof, and more particularly to a technique effective when applied to the formation of a metal thin film used in a high-performance semiconductor integrated circuit having a multilayer wiring.
[0002]
[Prior art]
Currently, in the field of multi-layer wiring technology, the number of wiring layers is increasing along with the high integration of semiconductor integrated circuit devices, and the wiring structure is made of aluminum alloy from the viewpoint of low resistance and high reliability. A laminated structure with a refractory metal is often used. On the other hand, in the formation of via holes, a blanket tungsten CVD (Chemical Vapor Deposition) technique is used because of the need to ensure good step coverage.
[0003]
The multilayer wiring technique using the blanket tungsten CVD method is, for example, as described in “Easy ULIS Technology”, p. A multilayer structure of CVD film / sputtered aluminum film can be formed. Here, the sputtered tungsten film is the lower layer, and the sputtered aluminum film is the upper layer.
[0004]
The tungsten film by blanket CVD method has good step coverage, so it is possible to ensure conduction even with a minute via hole, and it is also possible to bury the via hole, so that the wiring can be flattened, which is important as a multilayer wiring technique. .
[0005]
However, since the blanket tungsten CVD film has poor adhesion to the silicon oxide film, a sputtered tungsten film is required as an adhesive layer.
[0006]
[Problems to be solved by the invention]
By the way, when a via hole is opened in an interlayer insulating film that insulates the wiring layer, it is necessary to over-etch until reaching the lower wiring layer in order to avoid poor connection, but it is generally formed on a sputtered aluminum film. When the antireflection film is shaved and thinned and the amount of overetching is large, the antireflection film is completely removed and the underlying aluminum film is exposed.
[0007]
The sputtered tungsten film, which is the adhesive layer of the upper wiring layer deposited on the thinned antireflection film or exposed aluminum film, is sufficient at the bottom of the via hole as the via hole becomes finer and the aspect ratio becomes higher. Thickness cannot be obtained. That is, as the aspect ratio increases, the step coverage of the sputtered film decreases, and when the aspect ratio exceeds 2.0, the step coverage drastically decreases and the thickness of the bottom surface of the via hole decreases. This is because the deposition of the thin film material in the opening of the via hole obstructs the transport of the material into the hole, and in an extreme case, the opening is blocked.
[0008]
These situations cause the following problems. That is, when the blanket tungsten CVD film formed after the deposition of the sputtered tungsten film as the adhesive layer is formed, the WF ₆ gas as the source gas passes through the sputtered film and the antireflection film at the bottom of the via hole. This causes a problem that AlF ₃ that is an insulator is formed by reacting with the underlying aluminum film, leading to non-conduction.
[0009]
The formation of AlF ₃ causes connection failure, and even if connection failure does not occur, it may cause a decrease in reliability and performance such as response speed.
[0010]
An object of the present invention is to suppress the formation of an insulator on the bottom portion of the via hole, prevent the occurrence of a defect in the semiconductor integrated circuit device, and improve the performance.
[0011]
Another object of the present invention is to provide a method of manufacturing a semiconductor integrated circuit device that can suppress the formation of an insulator on the bottom surface of the via hole.
[0012]
Still another object of the present invention is to provide a method of manufacturing a semiconductor integrated circuit device that suppresses the diffusion of aluminum and suppresses the formation of the insulator.
[0013]
The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.
[0014]
[Means for Solving the Problems]
Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.
[0015]
(1) A semiconductor integrated circuit device of the present invention, a plurality of wiring layers including an alloy layer consisting mainly of aluminum, and an interlayer insulating layer which insulates from each other said wiring layer, wherein in order to connect the wiring layers with each other and an aspect ratio of 2.0 or more via holes and openings in the interlayer insulating layer is formed on top of the bottom portion and side portions and the insulating layer of the via hole, contact with the lower wiring layer of the via hole in the bottom portion of the via hole and, an adhesive layer of tungsten thin film formed by sputtering as a part of the upper wiring layer, and a tungsten layer formed by a CVD method is formed as a part of the upper wiring layer of the via hole on the adhesive layer, a semiconductor integrated circuit device including a film thickness of the formed on the bottom surface of the via hole the adhesive layer bottom face portion, formed by the CVD method Tan To prevent the permeation of the reactive gas used in forming the stent layer is obtained by a sufficient thickness.
[0016]
According to such a semiconductor integrated circuit device, in order to make the thickness of the bottom surface portion of the adhesive layer formed on the bottom surface portion of the via hole sufficient to prevent the permeation of the reactive gas, The aluminum layer is not reached, and an insulator is not formed. As a result, stable conduction of the via hole can be obtained. Here, WF ₆ can be exemplified as the reactive gas.
[0017]
(2) The semiconductor integrated circuit device according to the present invention is the semiconductor integrated circuit device according to (1), wherein the adhesive layer is a tungsten thin film formed by sputtering, or the film thickness of the bottom surface of the adhesive layer Is 30 nm or more.
[0018]
According to such a semiconductor integrated circuit device, in order to make the adhesive layer a tungsten thin film formed by a sputtering method, or to make the film thickness of the bottom surface portion of the adhesive layer 30 nm or more, it is possible to transmit a reactive gas such as WF ₆ . Can be effectively prevented. That is, since never tungsten is attacked by WF _6, it is convenient to block the transmission of WF _6, also, because the reaction between WF ₆ does not produce an insulating reaction product, to generate a conduction failure There is nothing. Furthermore, it is effective that tungsten exhibits a very good performance as an adhesive layer of the blanket tungsten CVD film.
[0019]
In addition, making the film thickness of the adhesive layer bottom surface portion 30 nm or more is based on the knowledge obtained by the study of the present inventors, and this value is the worst in which the antireflection film does not remain on the aluminum film. Even in this case, the value is sufficient to prevent permeation of the reactive gas.
[0020]
(3) The semiconductor integrated circuit device of the present invention has a tungsten adhesive layer formed by sputtering and a tungsten layer formed by blanket CVD in the lower layer portion, an alloy layer mainly composed of aluminum in the middle layer portion, and a reflection in the upper layer portion. and preventing film, a wiring layer having a plurality of layers comprising a semiconductor integrated circuit in which the wiring layer an aspect ratio that is opened in the interlayer insulating film for insulating the wiring layers via a 2.0 or more via holes are connected to each other an apparatus, the antireflection film, tungsten, consists either TiN or TiW, wire-bonding region in which the adhesive layer of the upper wiring layer is in contact with the antireflection film of the lower wiring layer at the bottom portion of the via hole thickness of the antireflection film in the to prevent the permeation of the reactive gas used in forming the tungsten layer by the blanket CVD It is an sufficient thickness to.
[0021]
According to such a semiconductor integrated circuit device, since tungsten, TiN, or TiW is used as the antireflection film, it can act as an antireflection film and at the same time prevent the passage of reactive gas.
[0022]
(4) A semiconductor integrated circuit device according to the present invention is the semiconductor integrated circuit device according to (3), wherein the thickness of the antireflection film is 100 nm or more.
[0023]
According to such a semiconductor integrated circuit device, even if the thickness of the antireflection film is reduced due to overetching of the antireflection film when opening the via hole, the thickness of the antireflection film is 100 nm or more. It is possible to prevent the reactive gas used in forming the blanket tungsten CVD layer from passing through the remaining antireflection film.
[0024]
(5) A method for manufacturing a semiconductor integrated circuit device according to the present invention is a method for manufacturing a semiconductor integrated circuit device having a wiring layer including an alloy layer containing aluminum as a main component and an antireflection film formed on the alloy layer. A method,
(A) in an interlayer insulating film formed on the wiring layer, a step of opening the via hole so that the aspect ratio is 2.0 or more,
(B) in the interlayer insulating film and the via hole, formed as a contact adhesive layer, a 30nm or more as well as to the film thickness of the hole bottom portion to the thickness on the interlayer insulating film 20% or more And a process of
(C) on the adhesive layer, and forming a Rita tungsten layer by the CVD method using a source gas containing WF _6,
Is included.
[0025]
According to such a method for manufacturing a semiconductor integrated circuit device, the adhesive layer prevents the thickness of the via hole bottom surface portion of the adhesive layer in the step (b) and the permeation of the source gas used in the step (c). Since the thickness is sufficient, it is possible to suppress the reaction between the source gas WF ₆ and the aluminum of the lower wiring layer, and to manufacture a semiconductor integrated circuit device free from poor conduction.
[0026]
(6) A method for manufacturing a semiconductor integrated circuit device according to the present invention is the method for manufacturing a semiconductor integrated circuit device according to (5), wherein the thickness of the bottom portion of the via hole is 20% of the thickness on the interlayer insulating film. In addition to the above, the thickness is 30 nm or more.
[0027]
According to such a method of manufacturing a semiconductor integrated circuit device, as described in (2) above, the adhesive layer has a film thickness of 30 nm or more which is sufficient to suppress the transmission of WF ₆ and the film on the bottom surface of the via hole. Since the thickness is 20% or more with respect to the film thickness on the interlayer insulating film, that is, the bottom coverage (coverage) of the adhesive layer is 20% or more, the thickness of the via hole opening is not increased more than necessary. The covering property of the tungsten layer formed on the upper layer can be kept good. This is particularly effective in the present invention in which the aspect ratio of the via hole is 2.0 or more. That is, although the tungsten film using the blanket CVD method has excellent step coverage, the step coverage deteriorates rapidly as the aspect ratio increases in a situation where the via hole opening is extremely blocked. This is because the deterioration of the step coverage is considered to be remarkable from the vicinity of the aspect ratio of 2.0 by the inventors' investigation.
[0028]
As a film forming method for achieving such bottom coverage of 20% or more, a collimation sputtering method or a long throw sputtering method can be exemplified.
[0029]
(7) A method for manufacturing a semiconductor integrated circuit device according to the present invention is a method for manufacturing a semiconductor integrated circuit device having a wiring layer including an alloy layer containing aluminum as a main component and an antireflection film formed on the alloy layer. A method,
(A) in an interlayer insulating film formed on the wiring layer, a step of opening the via hole so that the aspect ratio is 2.0 or more,
(B) in the interlayer insulating film and the inside of the via hole, and forming by sputtering the temperature of the contact adhesive layer to be formed the surface being maintained at room temperature or below,
(C) before Kise' adhesive layer, and forming a Rita tungsten layer by the CVD method using a source gas containing WF _6,
In the step of the (a), the antireflection film of Sharing, ABS line layer before positioned on the bottom surface of the via hole during the over-etching, to prevent transmission of the raw material gas used in the process of the (c) The over-etching of the antireflection film is stopped so that the thickness becomes sufficiently large.
Furthermore, in the method for manufacturing a semiconductor integrated circuit device of the present invention,
(A) performing the step (b) by a collimation sputtering method or a long throw sputtering method;
(B) using tungsten, tantalum, molybdenum, or chromium as the adhesive layer;
(C) Tungsten, TiN or TiW is used as the antireflection film.
Can do.
[0030]
According to such a method of manufacturing a semiconductor integrated circuit device, the antireflection film is over-etched so that the antireflection film of the lower wiring layer located on the bottom surface of the via hole has a thickness sufficient to prevent transmission of WF _6. Therefore, reliable connection between the wiring layers by over-etching of the antireflection film can be realized, and at the same time, the antireflection film can act as a blocking film for blocking the transmission of WF ₆ .
[0031]
(8) A semiconductor integrated circuit device according to the present invention is the method for manufacturing a semiconductor integrated circuit device according to any one of (5) to (7), wherein the adhesive layer is held in a state where the temperature of the surface to be formed is kept below room temperature. The film is formed by sputtering.
[0032]
According to such a method of manufacturing a semiconductor integrated circuit device, since the temperature of the surface to be formed is kept at room temperature or lower, the substrate temperature does not increase due to the action of plasma or the like due to sputtering during the formation of the adhesive layer. Diffusion to the bottom surface of the via hole can be suppressed. As a result, when forming the blanket tungsten CVD film, there is no formation of an insulator due to the combination of WF ₆ and the diffused aluminum, and the conduction margin can be improved.
[0033]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiments, and the repetitive description thereof will be omitted.
[0034]
(Embodiment 1)
FIG. 1 is a cross-sectional view showing an example of a semiconductor integrated circuit device according to an embodiment of the present invention.
[0035]
A well 2 and a thick field insulating film 3 formed by the LOCOS method are formed on the main surface of the semiconductor substrate 1, and impurities are introduced into the main surface of the semiconductor substrate 1 through a gate insulating film 4 of a silicon oxide film. A gate electrode 5 made of polycrystalline silicon is formed.
[0036]
A source / drain composed of a low concentration impurity region 6 and a high concentration impurity region 7 is formed on the main surface of the semiconductor substrate 1 on both sides of the gate electrode 5. A cap insulating film 8 made of a silicon oxide film is formed on the upper surface of the gate electrode 5. Sidewall spacers 9 made of silicon oxide are formed on the side walls of the gate electrode 5.
[0037]
The main surfaces of the gate electrode 5 and the semiconductor substrate 1 are covered with an insulating film 10 made of silicon oxide, and a contact hole 11 is opened in the insulating film 10.
[0038]
An adhesive layer 12 made of a tungsten film formed by sputtering is formed on the inner wall of the contact hole 11, and the contact hole 11 is buried with a blanket tungsten CVD film 13. An aluminum alloy layer 14 is formed on the blanket tungsten CVD film 13, and an antireflection film 15 for preventing patterning defects during lithography is formed on the aluminum alloy layer 14.
[0039]
The adhesive layer 12, the blanket tungsten CVD film 13, the aluminum alloy layer 14 and the antireflection film 15 constitute a wiring layer 16.
[0040]
The wiring layer 16 is covered with an interlayer insulating film 17, and a wiring layer 19 having the same configuration as the wiring layer 16 is formed in the via hole 18 opened in the interlayer insulating film 17.
[0041]
The adhesive layer 12 is formed to form a blanket tungsten CVD film 13 with poor adhesion in the contact hole 11 with good adhesion. In the first embodiment, 30 nm or more is formed on the bottom surface of the contact hole 11. The film thickness is as follows. In this way, by setting the thickness of the bottom surface portion of the adhesive layer 12 to 30 nm or more, it is possible to prevent the transmission of the bottom surface portion of the adhesive layer of WF ₆ that is a raw material gas used when forming the blanket tungsten CVD film 13. A compound of aluminum and WF ₆ formed as a result of permeation can prevent the formation of AlF ₃ as an insulator. As a result, poor connection at the bottom of the contact hole 11 can be prevented, a conduction margin can be secured, and reliability can be improved.
[0042]
Since the adhesive layer 12 is provided to prevent adhesion failure of the blanket tungsten CVD film 13, as shown in FIG. 5, the adhesive layer 12 is outside the blanket tungsten CVD film 13 in the semiconductor substrate 1. Is formed.
[0043]
The wiring layer 19 is covered with an interlayer insulating film 20, and a similar wiring layer 21 is further formed on the via hole 18 opened in the interlayer insulating film 20, and an interlayer insulating film 22 covering the wiring layer 21 is formed. . That is, the semiconductor integrated circuit device of the first embodiment has a multilayer wiring structure composed of three wiring layers having the same wiring structure.
[0044]
Next, a method for manufacturing the semiconductor integrated circuit device will be described with reference to FIGS.
[0045]
First, a well 2, a field insulating film 3, a gate insulating film 4, a gate electrode 5, a low concentration impurity region 6 and a high concentration impurity region 7 for forming a source / drain, a cap insulating film 8 and a side are formed on the main surface of the semiconductor substrate 1. A wall spacer 9 and an insulating film 10 are formed. As for these forming methods, since a known ion implantation method, LOCOS method, thin film forming technology, photolithography technology, etching technology, and the like can be used, details thereof are omitted.
[0046]
Next, a contact hole 11 having an aspect ratio of 2.0 or more is formed in a predetermined region of the insulating film 10 by using a known anisotropic etching technique to form a wiring layer 16 that is a first wiring layer. . Since the wiring layer 16 can be formed by the same method as that for the wiring layers 19 and 21 to be formed later, it will be described later for convenience of description.
[0047]
The wiring layer 16 has at least a structure in which the aluminum alloy layer 14 is a main conductive layer and a tungsten film, a TiN film, or a TiW film is formed on the aluminum alloy layer 14 as an antireflection film 15.
[0048]
After patterning the wiring layer 16, an interlayer insulating film 17 is formed, and a via hole 18 having an aspect ratio of 2.0 or more reaching the wiring layer 16 is formed therein (FIG. 2). At this time, the antireflection film 15 in the bottom surface 23 of the via hole 18 is lost or thinned due to over-etching of the opening (FIG. 2 shows an example of thinning).
[0049]
Next, the wiring layer 19 which is the second wiring layer is formed (FIG. 3).
[0050]
First, the adhesive layer 12 of the blanket tungsten CVD film 13 is formed by a sputtering film method. Examples of the sputtering method include a collimation sputtering method. In addition, a long throw sputtering method or the like can be used.
[0051]
If the above sputtering method is used, a film can be formed on the bottom surface portion 23 of the via hole 18 so as to have a film thickness of 20% or more of the film thickness of the flat portion of the substrate. By forming the film in this way, the lower aluminum alloy layer 14 is completely covered with the adhesive layer 12 which is a sputtered film at the bottom surface portion 23 of the via hole 18 before the blanket tungsten CVD film 13 is formed, and continues. Even when the blanket tungsten CVD film 13 is formed, a barrier layer of WF ₆ gas, which is the reaction gas, can be formed.
[0052]
Next, a blanket tungsten CVD film 13 is formed, a via hole 18 is buried, an aluminum alloy layer 14 is formed, an antireflection film 15 is further formed, and a wiring layer 19 which is a second wiring layer is formed. (FIG. 4).
[0053]
Next, the wiring layer 19 is patterned to form an interlayer insulating film 20, and a via hole 24 is formed in the same manner as described above.
[0054]
Next, a third wiring layer 21 is formed in the same manner as the second wiring layer 19, and is patterned to form an interlayer insulating film 22, whereby the semiconductor integrated circuit device of FIG. 1 is almost completed.
[0055]
According to such a semiconductor integrated circuit device and its manufacturing method, the following effects can be obtained.
[0056]
That is, the thickness of the adhesive layer 12 in the via holes 18 and 24 is set to a thickness of 30 nm or more by using a collimation sputtering method or a long throw sputtering method, so that WF which is a source gas used when forming the blanket tungsten CVD film 13 is used. ₆ can be prevented, and generation of AlF ₃ produced by the reaction between the aluminum alloy layer 14 of the lower wiring layer and WF ₆ can be prevented. Thereby, the connection reliability between wiring layers can be improved.
[0057]
(Embodiment 2)
In the semiconductor integrated circuit device according to the second embodiment, the antireflection film 15 made of a tungsten film, a TiN film, a TiW film, or the like in the first embodiment is formed with a thickness of, for example, 100 nm or more. It is. As a manufacturing method of the antireflection film 15, for example, a sputtering method can be used.
[0058]
With such a semiconductor integrated circuit device, the antireflection film 15 is not completely removed by over-etching when the via holes 18 and 24 are opened, and the WF used when the blanket tungsten CVD film 13 is formed. _A metal film to be a _6- gas barrier layer can be left. Therefore, the conduction margin of the via holes 18 and 24 can be improved.
[0059]
(Embodiment 3)
The manufacturing method of the semiconductor integrated circuit device according to the third embodiment is such that the sputtered film used as the adhesive layer 12 of the blanket tungsten CVD film 13 is formed at room temperature or lower in the first embodiment.
[0060]
Thereby, aluminum diffusion from the aluminum alloy layer 14 to the bottom surface portion 23 of the via holes 18 and 24 due to the substrate heating of the plasma during sputtering can be suppressed, and the conduction margin can be improved.
[0061]
As mentioned above, the invention made by the present inventor has been specifically described based on the embodiments of the invention. However, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the invention. Needless to say.
[0062]
For example, although the example of tungsten is shown as the adhesive layer 12, other refractory metals such as tantalum, molybdenum, and chromium may be used.
[0063]
In the above embodiment, an example of a three-layer wiring is shown, but a multilayer wiring having two layers or four or more layers may be used.
[0064]
【The invention's effect】
Among the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.
[0065]
(1) It is possible to provide a semiconductor integrated circuit device capable of improving the conduction margin and improving the reliability in a fine and high aspect ratio via hole and a method for manufacturing the same.
[0066]
(2) Insulator due to reaction between the reactive gas and the lower aluminum layer in order to make the thickness of the bottom surface of the adhesive layer formed on the bottom surface of the via hole sufficient to prevent the permeation of the reactive gas Without being formed, and stable conduction can be obtained.
[0067]
(3) Since the adhesive layer is a tungsten thin film formed by sputtering or the thickness of the bottom surface of the adhesive layer is 30 nm or more, the permeation of reactive gas such as WF ₆ can be effectively prevented.
[0068]
(4) Since tungsten, TiN, or TiW is used as the antireflection film, it can act as an antireflection film and at the same time prevent the permeation of reactive gas.
[0069]
(5) Since the film thickness of the antireflection film is 100 nm or more, even if the film thickness is reduced due to overetching of the antireflection film at the time of opening a via hole, it is possible to take a sufficient margin for overetching. The remaining antireflection film can prevent the transmission of the reactive gas used when forming the blanket tungsten CVD layer.
[0070]
(6) Since the adhesive layer has a thickness of 30 nm or more which is sufficient to suppress the transmission of WF ₆ and the bottom coverage of the adhesive layer on the bottom surface of the via hole is 20% or more, the thickness of the via hole opening is small. It does not become thicker than necessary, and the covering property of the tungsten layer formed on the adhesive layer can be kept good.
[0071]
(7) Since sputtering at the time of forming the adhesive layer keeps the temperature of the surface to be formed at room temperature or lower, the substrate temperature is not increased by the action of plasma or the like, and diffusion of aluminum to the bottom surface of the via hole is suppressed. be able to. As a result, when forming the blanket tungsten CVD film, there is no formation of an insulator due to the combination of WF ₆ and the diffused aluminum, and the conduction margin can be improved.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing an example of a semiconductor integrated circuit device according to an embodiment of the present invention.
FIG. 2 is a cross-sectional view showing an example of a method for manufacturing a semiconductor integrated circuit device according to an embodiment of the present invention.
FIG. 3 is a cross-sectional view showing an example of a method for manufacturing a semiconductor integrated circuit device according to an embodiment of the present invention.
FIG. 4 is a cross-sectional view showing an example of a method for manufacturing a semiconductor integrated circuit device according to an embodiment of the present invention.
FIG. 5 is a side view showing the relationship between an adhesive layer formed on a semiconductor substrate and a blanket tungsten CVD film.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Well 3 Field insulating film 4 Gate insulating film 5 Gate electrode 6 Low concentration impurity region 7 High concentration impurity region 8 Cap insulating film 9 Side wall spacer 10 Insulating film 11 Contact hole 12 Adhesive layer 13 Blanket tungsten CVD film 14 Aluminum Alloy layer 15 Antireflection film 16, 19, 21 Wiring layer 17, 20, 22 Interlayer insulating film 18, 24 Via hole 23 Bottom portion

Claims (5)

A method of manufacturing a semiconductor integrated circuit device having a wiring layer including an alloy layer mainly composed of aluminum and an antireflection film formed on the alloy layer ,
(A) in an interlayer insulating film formed on the wiring layer, a step of opening the via hole so that the aspect ratio is 2.0 or more,
(B) in the interlayer insulating film and the via hole, formed as a contact adhesive layer, a 30nm or more as well as to the film thickness of the hole bottom portion to the thickness on the interlayer insulating film 20% or more And a process of
(C) on the adhesive layer, and forming a Rita tungsten layer by the CVD method using a source gas containing WF _6,
A method for manufacturing a semiconductor integrated circuit device, comprising: A method of manufacturing a semiconductor integrated circuit device having a wiring layer including an alloy layer mainly composed of aluminum and an antireflection film formed on the alloy layer ,
(A) in an interlayer insulating film formed on the wiring layer, a step of opening the via hole so that the aspect ratio is 2.0 or more,
(B) in the interlayer insulating film and the inside of the via hole, and forming by sputtering the temperature of the contact adhesive layer to be formed the surface being maintained at room temperature or below,
(C) before Kise' adhesive layer, and forming a Rita tungsten layer by the CVD method using a source gas containing WF _6,
In the step of the (a), the antireflection film of Sharing, ABS line layer before positioned on the bottom surface of the via hole during the over-etching, to prevent transmission of the raw material gas used in the process of the (c) A method of manufacturing a semiconductor integrated circuit device, wherein over-etching of the antireflection film is stopped so as to have a sufficient thickness. 3. The method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein the step (b) is performed by a collimation sputtering method or a long throw sputtering method. 3. The method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein tungsten, tantalum, molybdenum, or chromium is used as the adhesive layer. 5. The method of manufacturing a semiconductor integrated circuit device according to claim 4, wherein tungsten, TiN or TiW is used as the antireflection film.

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