JPS5644937A - Adding circuit - Google Patents
Adding circuitInfo
- Publication number
- JPS5644937A JPS5644937A JP12031179A JP12031179A JPS5644937A JP S5644937 A JPS5644937 A JP S5644937A JP 12031179 A JP12031179 A JP 12031179A JP 12031179 A JP12031179 A JP 12031179A JP S5644937 A JPS5644937 A JP S5644937A
- Authority
- JP
- Japan
- Prior art keywords
- bits
- memory
- adder
- output
- address
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Character Discrimination (AREA)
Abstract
PURPOSE: To simplify the constitution of an adding circuit, by using a memory where the number of "1" in address data is stored correspondingly to address data.
CONSTITUTION: Memory 9 uses two (256×4)-bit memories 10 and 11, and adder 12 is used as the adder for bits. Upper 8 bits 8a of input information 8 of 16 bits/1 word are input to the address of memory 10. Lower 8 bits 8b are input to the address of memory 11. The output of memory 10 is (0100)=4, and the output of memory 11 is (0011)=3. Consequently, the number of black bits ("1") is obtained for upper 8 bits 8a and lower 8 bits 8b respectively. By inputting outputs of memories 10 and 11 to next-stage adder 12, the number of black bits ("1") in all 16 bits of input information 8 can be obtained as the output of adder 12.
COPYRIGHT: (C)1981,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12031179A JPS5644937A (en) | 1979-09-18 | 1979-09-18 | Adding circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12031179A JPS5644937A (en) | 1979-09-18 | 1979-09-18 | Adding circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5644937A true JPS5644937A (en) | 1981-04-24 |
Family
ID=14783093
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12031179A Pending JPS5644937A (en) | 1979-09-18 | 1979-09-18 | Adding circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5644937A (en) |
-
1979
- 1979-09-18 JP JP12031179A patent/JPS5644937A/en active Pending
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS55153052A (en) | Digital multiplier | |
JPS5530727A (en) | Information processor | |
JPS5657140A (en) | Address designation system of desk calculator | |
JPS55134442A (en) | Data transfer unit | |
JPS5644937A (en) | Adding circuit | |
JPS5617489A (en) | Character display processing system | |
JPS5588154A (en) | Data storage method | |
JPS54146932A (en) | Address converter | |
JPS54102938A (en) | Pattern generator for logic circuit test | |
JPS5644178A (en) | Buffer memory control system | |
JPS57162193A (en) | Large capacity memory device | |
JPS5668847A (en) | Data processor | |
JPS55112661A (en) | Memory control unit | |
JPS5532159A (en) | Memory system | |
JPS55105742A (en) | Output information generation circuit | |
JPS54152926A (en) | Address assignment system | |
JPS5661096A (en) | Error detection system for read only memory electrically erasable | |
JPS55159226A (en) | Data input and output unit | |
JPS54101627A (en) | Semiconductor memory device | |
JPS5699545A (en) | Microprogram control electronic computer | |
JPS54143028A (en) | Data transfer unit | |
JPS5576438A (en) | Display unit | |
JPS54109324A (en) | Generating circuit for key scanning signal | |
JPS55134460A (en) | Address conversion unit | |
JPS5510676A (en) | Character pattern generator |