JPS5639654A - Loop transmission memory system with update status - Google Patents

Loop transmission memory system with update status

Info

Publication number
JPS5639654A
JPS5639654A JP11503179A JP11503179A JPS5639654A JP S5639654 A JPS5639654 A JP S5639654A JP 11503179 A JP11503179 A JP 11503179A JP 11503179 A JP11503179 A JP 11503179A JP S5639654 A JPS5639654 A JP S5639654A
Authority
JP
Japan
Prior art keywords
information
status
update
loop transmission
stored
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11503179A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6355258B2 (index.php
Inventor
Shinji Takahashi
Mitsuhiro Hattori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11503179A priority Critical patent/JPS5639654A/ja
Publication of JPS5639654A publication Critical patent/JPS5639654A/ja
Publication of JPS6355258B2 publication Critical patent/JPS6355258B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/42—Loop networks

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Small-Scale Networks (AREA)
JP11503179A 1979-09-07 1979-09-07 Loop transmission memory system with update status Granted JPS5639654A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11503179A JPS5639654A (en) 1979-09-07 1979-09-07 Loop transmission memory system with update status

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11503179A JPS5639654A (en) 1979-09-07 1979-09-07 Loop transmission memory system with update status

Publications (2)

Publication Number Publication Date
JPS5639654A true JPS5639654A (en) 1981-04-15
JPS6355258B2 JPS6355258B2 (index.php) 1988-11-01

Family

ID=14652493

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11503179A Granted JPS5639654A (en) 1979-09-07 1979-09-07 Loop transmission memory system with update status

Country Status (1)

Country Link
JP (1) JPS5639654A (index.php)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5817597A (ja) * 1981-07-24 1983-02-01 Hitachi Ltd 情報処理システム
JPS6020903A (ja) * 1983-07-15 1985-02-02 Dainippon Ink & Chem Inc 高分子水分散液の製造法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5817597A (ja) * 1981-07-24 1983-02-01 Hitachi Ltd 情報処理システム
JPS6020903A (ja) * 1983-07-15 1985-02-02 Dainippon Ink & Chem Inc 高分子水分散液の製造法

Also Published As

Publication number Publication date
JPS6355258B2 (index.php) 1988-11-01

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