JPS5637636A - Semiconductor device with bump - Google Patents

Semiconductor device with bump

Info

Publication number
JPS5637636A
JPS5637636A JP11392479A JP11392479A JPS5637636A JP S5637636 A JPS5637636 A JP S5637636A JP 11392479 A JP11392479 A JP 11392479A JP 11392479 A JP11392479 A JP 11392479A JP S5637636 A JPS5637636 A JP S5637636A
Authority
JP
Japan
Prior art keywords
bump
protection film
semiconductor device
oxide films
positive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11392479A
Other languages
Japanese (ja)
Inventor
Katsuya Okumura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP11392479A priority Critical patent/JPS5637636A/en
Publication of JPS5637636A publication Critical patent/JPS5637636A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To include a protection film and to surely protect an internal wiring by coating all the parts except a bump section with positive oxide films. CONSTITUTION:An Al wiring 14a on an Si substrate 12 is covered with a protection film 16 and a window is opened. Ta 20 and Cu 22 are stacked on the protection film 16 and an Au bump 26 is formed by Au plating after applying resist masks 24 to the Cu 22. Next, the resists 24 are removed and after removing the Cu 22 by etching, positive formation is made to the exposed surface of the Ta 20 by using an aqueous solution of oxidalic acid and oxide films 20a are made. In this composition, a high reliability semiconductor device with a bump will be obtained.
JP11392479A 1979-09-05 1979-09-05 Semiconductor device with bump Pending JPS5637636A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11392479A JPS5637636A (en) 1979-09-05 1979-09-05 Semiconductor device with bump

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11392479A JPS5637636A (en) 1979-09-05 1979-09-05 Semiconductor device with bump

Publications (1)

Publication Number Publication Date
JPS5637636A true JPS5637636A (en) 1981-04-11

Family

ID=14624595

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11392479A Pending JPS5637636A (en) 1979-09-05 1979-09-05 Semiconductor device with bump

Country Status (1)

Country Link
JP (1) JPS5637636A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5266519A (en) * 1991-11-12 1993-11-30 Nec Corporation Method for forming a metal conductor in semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5266519A (en) * 1991-11-12 1993-11-30 Nec Corporation Method for forming a metal conductor in semiconductor device

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