JPS5629368A - Method of lowering fast surface level density for mos device - Google Patents

Method of lowering fast surface level density for mos device

Info

Publication number
JPS5629368A
JPS5629368A JP11017880A JP11017880A JPS5629368A JP S5629368 A JPS5629368 A JP S5629368A JP 11017880 A JP11017880 A JP 11017880A JP 11017880 A JP11017880 A JP 11017880A JP S5629368 A JPS5629368 A JP S5629368A
Authority
JP
Japan
Prior art keywords
surface level
mos device
level density
fast surface
lowering
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11017880A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6229914B2 (en:Method
Inventor
Ritsushiyu Rotaaru
Panmaa Eeritsuhi
Furiidoritsuhi Kaaruhaintsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens Corp
Original Assignee
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Corp filed Critical Siemens Corp
Publication of JPS5629368A publication Critical patent/JPS5629368A/ja
Publication of JPS6229914B2 publication Critical patent/JPS6229914B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H10P14/68—
    • H10D64/01338—
    • H10D64/0134—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/693—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials
    • H10P14/6336—
    • H10P14/6682—
    • H10P95/90—
    • H10W74/43—
    • H10W74/481—
    • H10D64/01342—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/91—Controlling charging state at semiconductor-insulator interface

Landscapes

  • Solid State Image Pick-Up Elements (AREA)
  • Formation Of Insulating Films (AREA)
  • Chemical Vapour Deposition (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP11017880A 1979-08-10 1980-08-11 Method of lowering fast surface level density for mos device Granted JPS5629368A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2932569A DE2932569C2 (de) 1979-08-10 1979-08-10 Verfahren zur Reduzierung der Dichte der schnellen Oberflächenzustände bei MOS-Bauelementen

Publications (2)

Publication Number Publication Date
JPS5629368A true JPS5629368A (en) 1981-03-24
JPS6229914B2 JPS6229914B2 (en:Method) 1987-06-29

Family

ID=6078215

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11017880A Granted JPS5629368A (en) 1979-08-10 1980-08-11 Method of lowering fast surface level density for mos device

Country Status (7)

Country Link
US (1) US4331709A (en:Method)
JP (1) JPS5629368A (en:Method)
CA (1) CA1152227A (en:Method)
DE (1) DE2932569C2 (en:Method)
FR (1) FR2463510A1 (en:Method)
GB (1) GB2056174B (en:Method)
GR (1) GR72931B (en:Method)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59213137A (ja) * 1983-05-16 1984-12-03 エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン 半導体装置の製造方法

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JPS5676539A (en) * 1979-11-28 1981-06-24 Sumitomo Electric Ind Ltd Formation of insulating film on semiconductor substrate
US4358326A (en) * 1980-11-03 1982-11-09 International Business Machines Corporation Epitaxially extended polycrystalline structures utilizing a predeposit of amorphous silicon with subsequent annealing
CA1218470A (en) * 1983-12-24 1987-02-24 Hisayoshi Yamoto Semiconductor device with polycrystalline silicon active region and ic including semiconductor device
JP2724702B2 (ja) * 1985-06-21 1998-03-09 日本テキサス・インスツルメンツ 株式会社 電荷結合型半導体装置の製造方法
US4692344A (en) * 1986-02-28 1987-09-08 Rca Corporation Method of forming a dielectric film and semiconductor device including said film
US4826733A (en) * 1986-12-03 1989-05-02 Dow Corning Corporation Sin-containing coatings for electronic devices
JP2589327B2 (ja) * 1987-11-14 1997-03-12 株式会社リコー 薄膜トランジスタの製造方法
US4840918A (en) * 1988-05-09 1989-06-20 Eastman Kodak Company Method of noise reduction in CCD solid state imagers
US4840917A (en) * 1988-07-13 1989-06-20 Eastman Kodak Company Method of interface state reduction in MNOS capacitors
US4962065A (en) * 1989-02-13 1990-10-09 The University Of Arkansas Annealing process to stabilize PECVD silicon nitride for application as the gate dielectric in MOS devices
US5264724A (en) * 1989-02-13 1993-11-23 The University Of Arkansas Silicon nitride for application as the gate dielectric in MOS devices
NL8901637A (nl) * 1989-06-28 1991-01-16 Gen Signal Thinfilm Company B Werkwijze voor het verwijderen van defekten in een gemetalliseerd halfgeleiderinrichting.
US5374833A (en) * 1990-03-05 1994-12-20 Vlsi Technology, Inc. Structure for suppression of field inversion caused by charge build-up in the dielectric
JP2666596B2 (ja) * 1991-04-15 1997-10-22 株式会社デンソー 酸化膜中のトラップ密度低減方法、及び半導体装置の製造方法
US6413805B1 (en) 1993-03-12 2002-07-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device forming method
JPH06349735A (ja) 1993-06-12 1994-12-22 Semiconductor Energy Lab Co Ltd 半導体装置
US5488000A (en) 1993-06-22 1996-01-30 Semiconductor Energy Laboratory Co., Ltd. Method of fabricating a thin film transistor using a nickel silicide layer to promote crystallization of the amorphous silicon layer
US6713330B1 (en) 1993-06-22 2004-03-30 Semiconductor Energy Laboratory Co., Ltd. Method of fabricating a thin film transistor
US5529937A (en) * 1993-07-27 1996-06-25 Semiconductor Energy Laboratory Co., Ltd. Process for fabricating thin film transistor
CN100367461C (zh) * 1993-11-05 2008-02-06 株式会社半导体能源研究所 一种制造薄膜晶体管和电子器件的方法
US6897100B2 (en) 1993-11-05 2005-05-24 Semiconductor Energy Laboratory Co., Ltd. Method for processing semiconductor device apparatus for processing a semiconductor and apparatus for processing semiconductor device
US6478263B1 (en) 1997-01-17 2002-11-12 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and its manufacturing method
JP3645378B2 (ja) 1996-01-19 2005-05-11 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP3645379B2 (ja) * 1996-01-19 2005-05-11 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP3729955B2 (ja) 1996-01-19 2005-12-21 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP3645380B2 (ja) 1996-01-19 2005-05-11 株式会社半導体エネルギー研究所 半導体装置の作製方法、情報端末、ヘッドマウントディスプレイ、ナビゲーションシステム、携帯電話、ビデオカメラ、投射型表示装置
US5985740A (en) 1996-01-19 1999-11-16 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a semiconductor device including reduction of a catalyst
US5888858A (en) 1996-01-20 1999-03-30 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and fabrication method thereof
US7056381B1 (en) 1996-01-26 2006-06-06 Semiconductor Energy Laboratory Co., Ltd. Fabrication method of semiconductor device
US6180439B1 (en) 1996-01-26 2001-01-30 Semiconductor Energy Laboratory Co., Ltd. Method for fabricating a semiconductor device
US6465287B1 (en) 1996-01-27 2002-10-15 Semiconductor Energy Laboratory Co., Ltd. Method for fabricating a semiconductor device using a metal catalyst and high temperature crystallization
US6100562A (en) 1996-03-17 2000-08-08 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a semiconductor device
JPH1070123A (ja) * 1996-06-17 1998-03-10 Siemens Ag 表面状態の不動態化を容易にする層を有する装置構造
US6017806A (en) * 1997-07-28 2000-01-25 Texas Instruments Incorporated Method to enhance deuterium anneal/implant to reduce channel-hot carrier degradation
JP3516596B2 (ja) * 1998-10-19 2004-04-05 松下電器産業株式会社 半導体装置の製造方法
US6373114B1 (en) * 1998-10-23 2002-04-16 Micron Technology, Inc. Barrier in gate stack for improved gate dielectric integrity
US6492712B1 (en) 1999-06-24 2002-12-10 Agere Systems Guardian Corp. High quality oxide for use in integrated circuits
US6670242B1 (en) 1999-06-24 2003-12-30 Agere Systems Inc. Method for making an integrated circuit device including a graded, grown, high quality gate oxide layer and a nitride layer
GB2355582A (en) * 1999-06-24 2001-04-25 Lucent Technologies Inc Gate oxides
US6551946B1 (en) 1999-06-24 2003-04-22 Agere Systems Inc. Two-step oxidation process for oxidizing a silicon substrate wherein the first step is carried out at a temperature below the viscoelastic temperature of silicon dioxide and the second step is carried out at a temperature above the viscoelastic temperature
US20030235957A1 (en) 2002-06-25 2003-12-25 Samir Chaudhry Method and structure for graded gate oxides on vertical and non-planar surfaces
GB2370416A (en) * 2000-07-25 2002-06-26 Agere Syst Guardian Corp Hydrogenation of dangling bonds at a gate oxide/semiconductor interface
DE10142267A1 (de) * 2001-08-29 2003-03-27 Infineon Technologies Ag Verfahren zum Abscheiden von Siliziumnitrid
USD720619S1 (en) 2011-08-22 2015-01-06 Kellogg North America Company Container

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3627589A (en) * 1970-04-01 1971-12-14 Gen Electric Method of stabilizing semiconductor devices
FR2394173A1 (fr) * 1977-06-06 1979-01-05 Thomson Csf Procede de fabrication de dispositifs electroniques qui comportent une couche mince de silicium amorphe et dispositif electronique obtenu par un tel procede
US4134125A (en) * 1977-07-20 1979-01-09 Bell Telephone Laboratories, Incorporated Passivation of metallized semiconductor substrates
US4113514A (en) * 1978-01-16 1978-09-12 Rca Corporation Method of passivating a semiconductor device by treatment with atomic hydrogen
US4181751A (en) * 1978-05-24 1980-01-01 Hughes Aircraft Company Process for the preparation of low temperature silicon nitride films by photochemical vapor deposition

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59213137A (ja) * 1983-05-16 1984-12-03 エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン 半導体装置の製造方法

Also Published As

Publication number Publication date
JPS6229914B2 (en:Method) 1987-06-29
DE2932569A1 (de) 1981-02-26
CA1152227A (en) 1983-08-16
FR2463510B1 (en:Method) 1984-08-24
DE2932569C2 (de) 1983-04-07
GB2056174A (en) 1981-03-11
GB2056174B (en) 1983-06-08
FR2463510A1 (fr) 1981-02-20
US4331709A (en) 1982-05-25
GR72931B (en:Method) 1984-01-12

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