JPS5629361A - Manufacture of semiconductor integrated circuit - Google Patents

Manufacture of semiconductor integrated circuit

Info

Publication number
JPS5629361A
JPS5629361A JP10531179A JP10531179A JPS5629361A JP S5629361 A JPS5629361 A JP S5629361A JP 10531179 A JP10531179 A JP 10531179A JP 10531179 A JP10531179 A JP 10531179A JP S5629361 A JPS5629361 A JP S5629361A
Authority
JP
Japan
Prior art keywords
layer
type
gate
film
short channel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10531179A
Other languages
Japanese (ja)
Other versions
JPS6231508B2 (en
Inventor
Hideaki Sadamatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP10531179A priority Critical patent/JPS5629361A/en
Publication of JPS5629361A publication Critical patent/JPS5629361A/en
Publication of JPS6231508B2 publication Critical patent/JPS6231508B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0623—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Local Oxidation Of Silicon (AREA)

Abstract

PURPOSE:To reduce the gate resistance and the noise of a semiconductor integrated circuit by implanting ion through an insulating film to form a channel by self-alignment to increase the transfer conductance thereof and increasing the size of a gate on the surface in short channel length state. CONSTITUTION:An N type epitaxial layer 102 is isolated with a P type layer 103 on a P type substrate 101 to form P type well 106, connecting layer 108a and base layer 108b thereon. Ions are implanted through the nitride film 104 to form low density N type layer 109 by the layers 108a, 108b. Then, the portion 109' between the film 104 and the layer 106 may become substantially short channel. The nitride film 104a on the portion 109' is retained, and N type layers 112a-112d are selectively formed by the oxide film mask. Subsequently, the nitride film 104a is removed by the oxide film mask 113 to form a shallow P<+> type surface gate layer 114. Finally, an oxide film 113' is coated thereon, and an electrode is attached thereto. Since in this configuration, short channel is formed to increase the transfer conductance and the surface gate is formed widely with low resistance and with low source resistance, its thermal noise is made extremely low.
JP10531179A 1979-08-17 1979-08-17 Manufacture of semiconductor integrated circuit Granted JPS5629361A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10531179A JPS5629361A (en) 1979-08-17 1979-08-17 Manufacture of semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10531179A JPS5629361A (en) 1979-08-17 1979-08-17 Manufacture of semiconductor integrated circuit

Publications (2)

Publication Number Publication Date
JPS5629361A true JPS5629361A (en) 1981-03-24
JPS6231508B2 JPS6231508B2 (en) 1987-07-08

Family

ID=14404150

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10531179A Granted JPS5629361A (en) 1979-08-17 1979-08-17 Manufacture of semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS5629361A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6451510U (en) * 1987-09-28 1989-03-30

Also Published As

Publication number Publication date
JPS6231508B2 (en) 1987-07-08

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