JPS5627952A - Circuit for generating substrate bias voltage - Google Patents

Circuit for generating substrate bias voltage

Info

Publication number
JPS5627952A
JPS5627952A JP10399479A JP10399479A JPS5627952A JP S5627952 A JPS5627952 A JP S5627952A JP 10399479 A JP10399479 A JP 10399479A JP 10399479 A JP10399479 A JP 10399479A JP S5627952 A JPS5627952 A JP S5627952A
Authority
JP
Japan
Prior art keywords
line
circuit
bias voltage
enhancement
drain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10399479A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0152906B2 (enrdf_load_stackoverflow
Inventor
Noburo Tanimura
Kotaro Nishimura
Norimasa Yasui
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP10399479A priority Critical patent/JPS5627952A/ja
Priority to DE19803030654 priority patent/DE3030654A1/de
Publication of JPS5627952A publication Critical patent/JPS5627952A/ja
Publication of JPH0152906B2 publication Critical patent/JPH0152906B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is DC
    • G05F3/10—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/205—Substrate bias-voltage generators
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
    • G11C5/146—Substrate bias generators

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Dc-Dc Converters (AREA)
JP10399479A 1979-08-17 1979-08-17 Circuit for generating substrate bias voltage Granted JPS5627952A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP10399479A JPS5627952A (en) 1979-08-17 1979-08-17 Circuit for generating substrate bias voltage
DE19803030654 DE3030654A1 (de) 1979-08-17 1980-08-13 Sperrvorspannungsgenerator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10399479A JPS5627952A (en) 1979-08-17 1979-08-17 Circuit for generating substrate bias voltage

Publications (2)

Publication Number Publication Date
JPS5627952A true JPS5627952A (en) 1981-03-18
JPH0152906B2 JPH0152906B2 (enrdf_load_stackoverflow) 1989-11-10

Family

ID=14368844

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10399479A Granted JPS5627952A (en) 1979-08-17 1979-08-17 Circuit for generating substrate bias voltage

Country Status (2)

Country Link
JP (1) JPS5627952A (enrdf_load_stackoverflow)
DE (1) DE3030654A1 (enrdf_load_stackoverflow)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56129358A (en) * 1980-03-12 1981-10-09 Mitsubishi Electric Corp Semiconductor integrated circuit
JPS61164249A (ja) * 1985-01-16 1986-07-24 Fujitsu Ltd 半導体装置
JPS6216557A (ja) * 1985-07-15 1987-01-24 Toshiba Corp 基板バイアス発生回路
JPS6216556A (ja) * 1985-07-15 1987-01-24 Toshiba Corp 基板バイアス発生回路
US5272676A (en) * 1990-11-20 1993-12-21 Hitachi, Ltd. Semiconductor integrated circuit device
US5276651A (en) * 1992-03-03 1994-01-04 Mitsubishi Denki Kabushiki Kaisha Voltage generating device generating a voltage at a constant level and operating method thereof

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4460835A (en) * 1980-05-13 1984-07-17 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor integrated circuit device with low power consumption in a standby mode using an on-chip substrate bias generator
JPS58105563A (ja) * 1981-12-17 1983-06-23 Mitsubishi Electric Corp 基板バイアス発生回路
JPS58153294A (ja) * 1982-03-04 1983-09-12 Mitsubishi Electric Corp 半導体記憶装置
JPS6441519A (en) * 1987-08-07 1989-02-13 Mitsubishi Electric Corp Semiconductor integrated circuit
FR2629639A1 (en) * 1988-04-01 1989-10-06 Balkanski Minko Self-powered integrated component of the junction type and method for its manufacture
KR910007740B1 (ko) * 1989-05-02 1991-09-30 삼성전자 주식회사 비트라인 안정화를 위한 전원전압 추적회로

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54148492A (en) * 1978-05-15 1979-11-20 Nec Corp Integrated circuit

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4142114A (en) * 1977-07-18 1979-02-27 Mostek Corporation Integrated circuit with threshold regulation

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54148492A (en) * 1978-05-15 1979-11-20 Nec Corp Integrated circuit

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56129358A (en) * 1980-03-12 1981-10-09 Mitsubishi Electric Corp Semiconductor integrated circuit
JPS61164249A (ja) * 1985-01-16 1986-07-24 Fujitsu Ltd 半導体装置
JPS6216557A (ja) * 1985-07-15 1987-01-24 Toshiba Corp 基板バイアス発生回路
JPS6216556A (ja) * 1985-07-15 1987-01-24 Toshiba Corp 基板バイアス発生回路
US5272676A (en) * 1990-11-20 1993-12-21 Hitachi, Ltd. Semiconductor integrated circuit device
US5276651A (en) * 1992-03-03 1994-01-04 Mitsubishi Denki Kabushiki Kaisha Voltage generating device generating a voltage at a constant level and operating method thereof

Also Published As

Publication number Publication date
DE3030654C2 (enrdf_load_stackoverflow) 1992-04-23
DE3030654A1 (de) 1981-03-26
JPH0152906B2 (enrdf_load_stackoverflow) 1989-11-10

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