JPS56166570A - Address generating circuit - Google Patents

Address generating circuit

Info

Publication number
JPS56166570A
JPS56166570A JP7191980A JP7191980A JPS56166570A JP S56166570 A JPS56166570 A JP S56166570A JP 7191980 A JP7191980 A JP 7191980A JP 7191980 A JP7191980 A JP 7191980A JP S56166570 A JPS56166570 A JP S56166570A
Authority
JP
Japan
Prior art keywords
addresses
output
modification
address
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7191980A
Other languages
Japanese (ja)
Inventor
Kenji Furuya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP7191980A priority Critical patent/JPS56166570A/en
Publication of JPS56166570A publication Critical patent/JPS56166570A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0284—Multiple user address space allocation, e.g. using different base addresses

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)

Abstract

PURPOSE:To facilitate sharing a memory and changing the system and reduce the processing work of a processor, by modifying addresses, which are output from a data processing device, by modification addresses. CONSTITUTION:A processor inputs address data composed of modification addresses to a latch circuit 7 through a data bus DBA and supplies latched modification addressed to an adder 6. Next, a selecting signal SEL is output, and selecting circuits 2 and 3 are instructed to select the data bus DBA and an address bus ABA. After that, since the processor outputs addresses to the address bus ABA successively according as the data processing progresses, addresses modified by an address generating circuit 4 are output to access a memory 1.
JP7191980A 1980-05-27 1980-05-27 Address generating circuit Pending JPS56166570A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7191980A JPS56166570A (en) 1980-05-27 1980-05-27 Address generating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7191980A JPS56166570A (en) 1980-05-27 1980-05-27 Address generating circuit

Publications (1)

Publication Number Publication Date
JPS56166570A true JPS56166570A (en) 1981-12-21

Family

ID=13474415

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7191980A Pending JPS56166570A (en) 1980-05-27 1980-05-27 Address generating circuit

Country Status (1)

Country Link
JP (1) JPS56166570A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01291343A (en) * 1988-05-18 1989-11-22 Nippon Telegr & Teleph Corp <Ntt> Memory managing device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01291343A (en) * 1988-05-18 1989-11-22 Nippon Telegr & Teleph Corp <Ntt> Memory managing device

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