JPS56160072A - Manufacture of insulated gate type field effect transistor - Google Patents
Manufacture of insulated gate type field effect transistorInfo
- Publication number
- JPS56160072A JPS56160072A JP5389880A JP5389880A JPS56160072A JP S56160072 A JPS56160072 A JP S56160072A JP 5389880 A JP5389880 A JP 5389880A JP 5389880 A JP5389880 A JP 5389880A JP S56160072 A JPS56160072 A JP S56160072A
- Authority
- JP
- Japan
- Prior art keywords
- earth
- layer
- region
- substrate
- type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000005669 field effect Effects 0.000 title 1
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000000758 substrate Substances 0.000 abstract 4
- 239000012535 impurity Substances 0.000 abstract 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 abstract 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 abstract 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract 1
- 229910052782 aluminium Inorganic materials 0.000 abstract 1
- 229910052796 boron Inorganic materials 0.000 abstract 1
- 239000011521 glass Substances 0.000 abstract 1
- 230000001681 protective effect Effects 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
Abstract
PURPOSE:To prevent the decrease in a withstand voltage by an auto-doping by a method wherein a high impurity density earth layer is formed inside a semiconductor substrate using an ion-injecting method, and a low impurity density epitaxial layer is grown on the surface of the substrate. CONSTITUTION:Boron is selectively injected inside the P type silicon substrate 9 to form the earth layer 10. Then, the P type epitaxial layer 11 is grown. Then, a P type earth drawing out layer 12 is formed to form an N type source region 2 and a drain region 3. As the next step, a gate insulating film 5 and a gate electrode 6 are formed, and an offset gate region 4 is formed by the ion injecting method. Subsequently, a phosphor glass protective film 15 is formed and evaporated with aluminum to form a drain electrode 7 and a source electrode 8. Due to the earth region 10 formed inside the substrate, the auto-doping at the time of the epitaxial growth does not take place, and the withstand voltage at the junction is improved.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5389880A JPS56160072A (en) | 1980-04-23 | 1980-04-23 | Manufacture of insulated gate type field effect transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5389880A JPS56160072A (en) | 1980-04-23 | 1980-04-23 | Manufacture of insulated gate type field effect transistor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS56160072A true JPS56160072A (en) | 1981-12-09 |
| JPS6156626B2 JPS6156626B2 (en) | 1986-12-03 |
Family
ID=12955534
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5389880A Granted JPS56160072A (en) | 1980-04-23 | 1980-04-23 | Manufacture of insulated gate type field effect transistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS56160072A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5304827A (en) * | 1991-10-15 | 1994-04-19 | Texas Instruments Incorporated | Performance lateral double-diffused MOS transistor |
-
1980
- 1980-04-23 JP JP5389880A patent/JPS56160072A/en active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5304827A (en) * | 1991-10-15 | 1994-04-19 | Texas Instruments Incorporated | Performance lateral double-diffused MOS transistor |
| US5382535A (en) * | 1991-10-15 | 1995-01-17 | Texas Instruments Incorporated | Method of fabricating performance lateral double-diffused MOS transistor |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6156626B2 (en) | 1986-12-03 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A313 | Final decision of rejection without a dissenting response from the applicant |
Effective date: 20040621 Free format text: JAPANESE INTERMEDIATE CODE: A313 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20040720 |