JPS56154833A - Super-regenerative reception system - Google Patents

Super-regenerative reception system

Info

Publication number
JPS56154833A
JPS56154833A JP5826480A JP5826480A JPS56154833A JP S56154833 A JPS56154833 A JP S56154833A JP 5826480 A JP5826480 A JP 5826480A JP 5826480 A JP5826480 A JP 5826480A JP S56154833 A JPS56154833 A JP S56154833A
Authority
JP
Japan
Prior art keywords
circuit
base bias
voltage
super
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5826480A
Other languages
Japanese (ja)
Other versions
JPS6227575B2 (en
Inventor
Keiichi Mizuguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP5826480A priority Critical patent/JPS56154833A/en
Publication of JPS56154833A publication Critical patent/JPS56154833A/en
Publication of JPS6227575B2 publication Critical patent/JPS6227575B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/16—Circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Circuits Of Receivers In General (AREA)

Abstract

PURPOSE:To set the base bias voltage of a quenching oscillating circuit to the best level all the time by controlling the base bias voltage of the transistor of the quenching oscillating circuit through a super-regenerative control circuit with the output of a sensitivity-decrease preventing circuit. CONSTITUTION:Base bias voltage VB of quenching oscillating circuit 8 is compared with preset reference voltage VZ of sensitivity-decrease preventing circuit 17 and when voltage VB is lower than voltage VZ, the base bias of circuit 8 is set properly, holding the output of comparator 18 at a low potential. When VB is higher than VZ, on the other hand, the base bias of circuit 8 is set to a wrong voltage, holding the output of comparator at a high potential. For this purpose, the output variation of the next-stage transistor T4 is utilized to reset the control operation of super- regenerative control circuit 16 through the discharging of a capacitor (not shown in the figure), and the best control is exercised by circuit 16, so that the base bias voltage of circuit 8 is set to the best level in case of any disturbance.
JP5826480A 1980-04-30 1980-04-30 Super-regenerative reception system Granted JPS56154833A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5826480A JPS56154833A (en) 1980-04-30 1980-04-30 Super-regenerative reception system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5826480A JPS56154833A (en) 1980-04-30 1980-04-30 Super-regenerative reception system

Publications (2)

Publication Number Publication Date
JPS56154833A true JPS56154833A (en) 1981-11-30
JPS6227575B2 JPS6227575B2 (en) 1987-06-16

Family

ID=13079298

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5826480A Granted JPS56154833A (en) 1980-04-30 1980-04-30 Super-regenerative reception system

Country Status (1)

Country Link
JP (1) JPS56154833A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57207437A (en) * 1981-06-15 1982-12-20 Matsushita Electric Works Ltd Receiving system of optimum sensitivity for super- regenerative receiver

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57207437A (en) * 1981-06-15 1982-12-20 Matsushita Electric Works Ltd Receiving system of optimum sensitivity for super- regenerative receiver

Also Published As

Publication number Publication date
JPS6227575B2 (en) 1987-06-16

Similar Documents

Publication Publication Date Title
JPS56154833A (en) Super-regenerative reception system
JPS5346785A (en) Phase discriminator circuit
JPS55100735A (en) Oscillation circuit
JPS56150382A (en) Electronic watch
JPS52102657A (en) Transistor amplifier circuit
JPS5526709A (en) Amplifier circuit
JPS56135285A (en) White level tracking circuit
JPS5723318A (en) Comparator using programable unijunction transistor
JPS54109882A (en) Battery voltage detecting circuit
JPS5595102A (en) Detection circuit for power failure of controller
JPS5518172A (en) Automatic frequency control circuit
JPS55149873A (en) Overcurrent detector
JPS56157643A (en) Dc power source device for car
JPS5659322A (en) Constant-voltage circuit
JPS5322347A (en) Analogue memory circuit
JPS5683296A (en) Detector of operation of motor for clock
JPS57113772A (en) Detecting circuit for trouble of rectifying diode
JPS5720021A (en) Complementary mos transistor oscillating circuit
JPS57182816A (en) Direct current stabilizing power supply circuit
JPS5597728A (en) Oscillation circuit
JPS5333347A (en) Power supply circuit of switching control type
JPS57175962A (en) Detecting and resetting circuit for voltage drop
JPS5730960A (en) Input buffer circuit device
JPS5265832A (en) Power-off detector
JPS5379360A (en) Trigger pulse generating circuit