JPS5526709A - Amplifier circuit - Google Patents

Amplifier circuit

Info

Publication number
JPS5526709A
JPS5526709A JP9889378A JP9889378A JPS5526709A JP S5526709 A JPS5526709 A JP S5526709A JP 9889378 A JP9889378 A JP 9889378A JP 9889378 A JP9889378 A JP 9889378A JP S5526709 A JPS5526709 A JP S5526709A
Authority
JP
Japan
Prior art keywords
terminal
voltage
discharge
level
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9889378A
Other languages
Japanese (ja)
Inventor
Yoshinari Kitamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP9889378A priority Critical patent/JPS5526709A/en
Publication of JPS5526709A publication Critical patent/JPS5526709A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/04Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only
    • H03F3/16Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only with field-effect devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To obtain an amplifier circuit using MISFET which is suitable to a sense circuit of memory IC. CONSTITUTION:With a voltage at input terminal 1 held at level ''L'', MISFETQD conducts, a voltage at outpt terminal 2 is at level ''L'', and negative feedback MISFETQF is OFF. With terminal 1 ''H'', on the other hand, the conduction resistance of QD increases to make terminal 2 ''H'' and QF conducts, thereby stopping the voltage at terminal 1 from rising. Namely, if the voltage at terminal 1 becomes higher than the voltage at terminal 2, the decrease in conduction resistance of QF stops the voltage rise of terminal 1, thereby holding the irreducible voltage at which the terminal is at level ''H''. Next, when the discharge of terminal 1 lowers voltage, the time needed of the discharge is short because of the voltage held low as mentioned above and QF also contributes to the discharge, so that the time will be shortened more. In this way, the switching time for states is shortened and this circuit is suitable to the sense circuit of a memory.
JP9889378A 1978-08-14 1978-08-14 Amplifier circuit Pending JPS5526709A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9889378A JPS5526709A (en) 1978-08-14 1978-08-14 Amplifier circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9889378A JPS5526709A (en) 1978-08-14 1978-08-14 Amplifier circuit

Publications (1)

Publication Number Publication Date
JPS5526709A true JPS5526709A (en) 1980-02-26

Family

ID=14231805

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9889378A Pending JPS5526709A (en) 1978-08-14 1978-08-14 Amplifier circuit

Country Status (1)

Country Link
JP (1) JPS5526709A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0052010A1 (en) * 1980-11-12 1982-05-19 Fujitsu Limited Buffer amplifier circuit and address buffer circuit using such buffer amplifier circuit
EP0264933A2 (en) * 1986-10-21 1988-04-27 Brooktree Corporation System employing negative feedback for decreasing the response time of a memory cell

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50138745A (en) * 1974-04-23 1975-11-05
JPS525256A (en) * 1975-07-01 1977-01-14 Sanyo Electric Co Ltd High speed logic block

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50138745A (en) * 1974-04-23 1975-11-05
JPS525256A (en) * 1975-07-01 1977-01-14 Sanyo Electric Co Ltd High speed logic block

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0052010A1 (en) * 1980-11-12 1982-05-19 Fujitsu Limited Buffer amplifier circuit and address buffer circuit using such buffer amplifier circuit
EP0264933A2 (en) * 1986-10-21 1988-04-27 Brooktree Corporation System employing negative feedback for decreasing the response time of a memory cell

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