JPS56153592A - Output memory device - Google Patents
Output memory deviceInfo
- Publication number
- JPS56153592A JPS56153592A JP5662180A JP5662180A JPS56153592A JP S56153592 A JPS56153592 A JP S56153592A JP 5662180 A JP5662180 A JP 5662180A JP 5662180 A JP5662180 A JP 5662180A JP S56153592 A JPS56153592 A JP S56153592A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- parity
- circuit
- data
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
Abstract
PURPOSE:To enable to check failure of storage operation of the output memory device, by comparing the parity signal added to the input data with the parity signal added to the memory output data. CONSTITUTION:The parity signal F with the input data A is given to the parity coincidence detection circuit 21. After that, the memory 11 reads in the data A with the normal confirmation output H of the read-in control signal circuit 13 and the parity signal K is delivered from the parity addition circuit 16, then the signal K is given to the circuit 21. The circuit 21 returns the parity check read-in end signal L to the control section 1 when the signals F and K are in agreement and the read-in end signal J is obtained at the time delay circuit 15. The control section 1 can judge the correct transfer of the data A to each memory device and the stored data A in this memory 11 correctly, through the return of the signal L.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55056621A JPS6042505B2 (en) | 1980-04-25 | 1980-04-25 | output memory device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55056621A JPS6042505B2 (en) | 1980-04-25 | 1980-04-25 | output memory device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56153592A true JPS56153592A (en) | 1981-11-27 |
JPS6042505B2 JPS6042505B2 (en) | 1985-09-24 |
Family
ID=13032347
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55056621A Expired JPS6042505B2 (en) | 1980-04-25 | 1980-04-25 | output memory device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6042505B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61180341U (en) * | 1985-04-30 | 1986-11-11 |
-
1980
- 1980-04-25 JP JP55056621A patent/JPS6042505B2/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61180341U (en) * | 1985-04-30 | 1986-11-11 |
Also Published As
Publication number | Publication date |
---|---|
JPS6042505B2 (en) | 1985-09-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS57157374A (en) | Remote test controlling system | |
JPS56153592A (en) | Output memory device | |
JPS5694596A (en) | Memory control system | |
JPS5694597A (en) | Memory data control system | |
JPS5231629A (en) | Data communiction system | |
JPS5741069A (en) | Inter-frame encoding system | |
JPS5526704A (en) | Two-dimentional sequential coding system | |
JPS57208689A (en) | Memory control device | |
JPS5637573A (en) | Integrated circuit with tracer memory | |
JPS5299029A (en) | Input/output interface control system | |
JPS56112149A (en) | Condensing method for transmission circuit trace information | |
JPS5531375A (en) | Signal transmission system | |
JPS5755446A (en) | Check system for digital transfer data | |
JPS5583960A (en) | Paragraph associater | |
JPS54818A (en) | Signal input device | |
JPS5557926A (en) | Output controller of programmable controller | |
JPS578999A (en) | Memory controller | |
JPS5353932A (en) | Fault detection system for memory address line | |
JPS5556264A (en) | Error detection circuit | |
JPS57143800A (en) | Storage device | |
JPS57197653A (en) | Control device of microprogram | |
JPS5733496A (en) | Data processor | |
JPS57100536A (en) | Data buffer device | |
JPS56168251A (en) | Data transfer buffer system | |
JPS56132645A (en) | Check system of input data selection signal for register |