JPS56148863A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS56148863A
JPS56148863A JP5246980A JP5246980A JPS56148863A JP S56148863 A JPS56148863 A JP S56148863A JP 5246980 A JP5246980 A JP 5246980A JP 5246980 A JP5246980 A JP 5246980A JP S56148863 A JPS56148863 A JP S56148863A
Authority
JP
Japan
Prior art keywords
base
film
emitter
insulator
contacting part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5246980A
Other languages
English (en)
Other versions
JPS641063B2 (ja
Inventor
Reiji Takashina
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP5246980A priority Critical patent/JPS56148863A/ja
Publication of JPS56148863A publication Critical patent/JPS56148863A/ja
Publication of JPS641063B2 publication Critical patent/JPS641063B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bipolar Transistors (AREA)
JP5246980A 1980-04-21 1980-04-21 Manufacture of semiconductor device Granted JPS56148863A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5246980A JPS56148863A (en) 1980-04-21 1980-04-21 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5246980A JPS56148863A (en) 1980-04-21 1980-04-21 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS56148863A true JPS56148863A (en) 1981-11-18
JPS641063B2 JPS641063B2 (ja) 1989-01-10

Family

ID=12915568

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5246980A Granted JPS56148863A (en) 1980-04-21 1980-04-21 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS56148863A (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61229362A (ja) * 1985-03-23 1986-10-13 ノーザン テレコム リミテッド バイポーラトランジスタの製造方法
US4883772A (en) * 1986-09-11 1989-11-28 National Semiconductor Corporation Process for making a self-aligned silicide shunt
US4983531A (en) * 1990-02-12 1991-01-08 Motorola, Inc. Method of fabricating a single polysilicon bipolar transistor which is compatible with a method of fabricating CMOS transistors

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0265682U (ja) * 1988-11-08 1990-05-17

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61229362A (ja) * 1985-03-23 1986-10-13 ノーザン テレコム リミテッド バイポーラトランジスタの製造方法
US4883772A (en) * 1986-09-11 1989-11-28 National Semiconductor Corporation Process for making a self-aligned silicide shunt
US4983531A (en) * 1990-02-12 1991-01-08 Motorola, Inc. Method of fabricating a single polysilicon bipolar transistor which is compatible with a method of fabricating CMOS transistors

Also Published As

Publication number Publication date
JPS641063B2 (ja) 1989-01-10

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