JPS56146236A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS56146236A
JPS56146236A JP5061580A JP5061580A JPS56146236A JP S56146236 A JPS56146236 A JP S56146236A JP 5061580 A JP5061580 A JP 5061580A JP 5061580 A JP5061580 A JP 5061580A JP S56146236 A JPS56146236 A JP S56146236A
Authority
JP
Japan
Prior art keywords
insulating film
metallic
film
photoresists
electrodes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5061580A
Other languages
Japanese (ja)
Inventor
Onori Ishikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP5061580A priority Critical patent/JPS56146236A/en
Publication of JPS56146236A publication Critical patent/JPS56146236A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To manufacture a metallic pattern by a method wherein an insulating film is formed on a semiconductor substrate surface on which a metallic layer to be made an electrode and wiring, and then a photoresist pattern is provided and the insulating film and the metallic layer are spatter-etched with the photoresist pattern as a mask. CONSTITUTION:There is given a description of an example in which electrodes of an MOS transistor are formed. Individual semiconductor regions 1, 2 and a gate 3 of the MOS transistor are formed on the semiconductor substrate S and covered with a CVD oxide film 4 over the whole surface. Then, an alminum metallic film 8 for the electrodes is evaporated after the formation of contact windows 5a, 5b and 5c. Next a insulating film 9 is grown under vapor phase growth. Finally, the photoresists 10, 11, 12 are selectively attached to the parts where the electrodes are formed, and the insulating film 9 and the metallic film 8 are spatter-etched with the photoresists as the masks. Since the insulating film 9 protects the metallic film 8 below the photoresists and at the same time acts as an etching mask, a patterning can satisfactrily be attained.
JP5061580A 1980-04-16 1980-04-16 Manufacture of semiconductor device Pending JPS56146236A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5061580A JPS56146236A (en) 1980-04-16 1980-04-16 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5061580A JPS56146236A (en) 1980-04-16 1980-04-16 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS56146236A true JPS56146236A (en) 1981-11-13

Family

ID=12863871

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5061580A Pending JPS56146236A (en) 1980-04-16 1980-04-16 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS56146236A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53118372A (en) * 1977-03-26 1978-10-16 Victor Co Of Japan Ltd Pattern formation by plasma etching method

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53118372A (en) * 1977-03-26 1978-10-16 Victor Co Of Japan Ltd Pattern formation by plasma etching method

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