JPS56144566A - Lead frame and forming method therefor and semiconductor device using the same - Google Patents

Lead frame and forming method therefor and semiconductor device using the same

Info

Publication number
JPS56144566A
JPS56144566A JP4684980A JP4684980A JPS56144566A JP S56144566 A JPS56144566 A JP S56144566A JP 4684980 A JP4684980 A JP 4684980A JP 4684980 A JP4684980 A JP 4684980A JP S56144566 A JPS56144566 A JP S56144566A
Authority
JP
Japan
Prior art keywords
tab
leads
cut
lead
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4684980A
Other languages
Japanese (ja)
Inventor
Kazuo Shimizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP4684980A priority Critical patent/JPS56144566A/en
Publication of JPS56144566A publication Critical patent/JPS56144566A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H01L23/49551—Cross section geometry characterised by bent parts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

Landscapes

  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To reduce the dimensional instability of tab hanging leads and prevent decrease in yield thereof by lowering a tab by using tab hanging lead portions, and cutting portions other than the lead needed for mechanical support of the tab. CONSTITUTION:A tab 4 is punched so as to be hung by leads 6 and 13 and lowered by using dies 15 and 16 to provide bent portions 6A and 13A near the tab. Then, the tab 4 is placed on a die 18 which has a recess of the same configuration as the lowered tab together with a recess 18A for receiving a cutting edge 17, and a portion 14 including the tab lowering portion 13A is cut off so that the tab 4 and the lead 13 are cut apart from each other. Then, a pellet 5 is mounted onto the tab 4, the cut- off tab-hanging lead 13 and other inner leads 3 are connected in a given manner, and this is sealed into a package to complete a semiconductor device. By said constitution, the tab is hung by means of at least two leads, plastically deformed by means of dies and then leads other than one needed for support are cut off. Therefore, dimensional instability is reduced and the yield is improved.
JP4684980A 1980-04-11 1980-04-11 Lead frame and forming method therefor and semiconductor device using the same Pending JPS56144566A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4684980A JPS56144566A (en) 1980-04-11 1980-04-11 Lead frame and forming method therefor and semiconductor device using the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4684980A JPS56144566A (en) 1980-04-11 1980-04-11 Lead frame and forming method therefor and semiconductor device using the same

Publications (1)

Publication Number Publication Date
JPS56144566A true JPS56144566A (en) 1981-11-10

Family

ID=12758779

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4684980A Pending JPS56144566A (en) 1980-04-11 1980-04-11 Lead frame and forming method therefor and semiconductor device using the same

Country Status (1)

Country Link
JP (1) JPS56144566A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6080262A (en) * 1983-10-07 1985-05-08 Nec Corp Semiconductor device
JPS6384143A (en) * 1986-09-29 1988-04-14 Matsushita Electronics Corp Lead frame
JPS63177544A (en) * 1987-01-19 1988-07-21 Nippon Denso Co Ltd Lead frame
JP2008042100A (en) * 2006-08-09 2008-02-21 Sanken Electric Co Ltd Semiconductor device, and method of manufacturing lead frame assembly

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6080262A (en) * 1983-10-07 1985-05-08 Nec Corp Semiconductor device
JPS6384143A (en) * 1986-09-29 1988-04-14 Matsushita Electronics Corp Lead frame
JPH0770676B2 (en) * 1986-09-29 1995-07-31 松下電子工業株式会社 Semiconductor device
JPS63177544A (en) * 1987-01-19 1988-07-21 Nippon Denso Co Ltd Lead frame
JP2008042100A (en) * 2006-08-09 2008-02-21 Sanken Electric Co Ltd Semiconductor device, and method of manufacturing lead frame assembly

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