JPS53135574A - Lead frame - Google Patents

Lead frame

Info

Publication number
JPS53135574A
JPS53135574A JP4994077A JP4994077A JPS53135574A JP S53135574 A JPS53135574 A JP S53135574A JP 4994077 A JP4994077 A JP 4994077A JP 4994077 A JP4994077 A JP 4994077A JP S53135574 A JPS53135574 A JP S53135574A
Authority
JP
Japan
Prior art keywords
lead frame
lead
wire
clearances
tabs
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4994077A
Other languages
Japanese (ja)
Inventor
Hisashi Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP4994077A priority Critical patent/JPS53135574A/en
Publication of JPS53135574A publication Critical patent/JPS53135574A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE: To improve the thermal dissipation performance and to avoid the tab short and open wire due to wire, by adopting the form that tabs are enlarged and the circumference parts are inserted between the clearances of each lead, in a lead frame.
COPYRIGHT: (C)1978,JPO&Japio
JP4994077A 1977-05-02 1977-05-02 Lead frame Pending JPS53135574A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4994077A JPS53135574A (en) 1977-05-02 1977-05-02 Lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4994077A JPS53135574A (en) 1977-05-02 1977-05-02 Lead frame

Publications (1)

Publication Number Publication Date
JPS53135574A true JPS53135574A (en) 1978-11-27

Family

ID=12845012

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4994077A Pending JPS53135574A (en) 1977-05-02 1977-05-02 Lead frame

Country Status (1)

Country Link
JP (1) JPS53135574A (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5662346A (en) * 1979-10-26 1981-05-28 Hitachi Ltd Lead frame and semicondcutor device having thereof
JPS61144855A (en) * 1984-12-18 1986-07-02 エツセ・ジ・エツセ・ミクロエレツトロニーカ・エツセ・ピ・ア Package for semiconductor circuit
JPS62120359U (en) * 1986-01-23 1987-07-30
JPS63148668A (en) * 1986-12-11 1988-06-21 Mitsubishi Electric Corp Lead frame for semiconductor device
JPS63174347A (en) * 1987-01-13 1988-07-18 Shinko Electric Ind Co Ltd Lead frame
JPH02145425U (en) * 1989-05-12 1990-12-10
WO1996002943A1 (en) * 1994-07-19 1996-02-01 Analog Devices, Inc. Thermally enhanced leadframe
US5519576A (en) * 1994-07-19 1996-05-21 Analog Devices, Inc. Thermally enhanced leadframe
EP1347514A3 (en) * 2002-02-27 2005-10-19 Sanyo Electric Co., Ltd. Semiconductor device
JP2008205337A (en) * 2007-02-22 2008-09-04 Rohm Co Ltd Resin sealed semiconductor device

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5662346A (en) * 1979-10-26 1981-05-28 Hitachi Ltd Lead frame and semicondcutor device having thereof
JPS6257107B2 (en) * 1979-10-26 1987-11-30 Hitachi Ltd
JPS61144855A (en) * 1984-12-18 1986-07-02 エツセ・ジ・エツセ・ミクロエレツトロニーカ・エツセ・ピ・ア Package for semiconductor circuit
JPS62120359U (en) * 1986-01-23 1987-07-30
JPS63148668A (en) * 1986-12-11 1988-06-21 Mitsubishi Electric Corp Lead frame for semiconductor device
JPS63174347A (en) * 1987-01-13 1988-07-18 Shinko Electric Ind Co Ltd Lead frame
JPH02145425U (en) * 1989-05-12 1990-12-10
WO1996002943A1 (en) * 1994-07-19 1996-02-01 Analog Devices, Inc. Thermally enhanced leadframe
US5519576A (en) * 1994-07-19 1996-05-21 Analog Devices, Inc. Thermally enhanced leadframe
EP1347514A3 (en) * 2002-02-27 2005-10-19 Sanyo Electric Co., Ltd. Semiconductor device
JP2008205337A (en) * 2007-02-22 2008-09-04 Rohm Co Ltd Resin sealed semiconductor device

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