JPS56143581A - Memory circuit with bcd decoder - Google Patents

Memory circuit with bcd decoder

Info

Publication number
JPS56143581A
JPS56143581A JP4666480A JP4666480A JPS56143581A JP S56143581 A JPS56143581 A JP S56143581A JP 4666480 A JP4666480 A JP 4666480A JP 4666480 A JP4666480 A JP 4666480A JP S56143581 A JPS56143581 A JP S56143581A
Authority
JP
Japan
Prior art keywords
bcd code
circuit
address
error detection
decoder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4666480A
Other languages
English (en)
Other versions
JPS6236579B2 (ja
Inventor
Masunori Sugimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP4666480A priority Critical patent/JPS56143581A/ja
Publication of JPS56143581A publication Critical patent/JPS56143581A/ja
Publication of JPS6236579B2 publication Critical patent/JPS6236579B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)
JP4666480A 1980-04-09 1980-04-09 Memory circuit with bcd decoder Granted JPS56143581A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4666480A JPS56143581A (en) 1980-04-09 1980-04-09 Memory circuit with bcd decoder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4666480A JPS56143581A (en) 1980-04-09 1980-04-09 Memory circuit with bcd decoder

Publications (2)

Publication Number Publication Date
JPS56143581A true JPS56143581A (en) 1981-11-09
JPS6236579B2 JPS6236579B2 (ja) 1987-08-07

Family

ID=12753604

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4666480A Granted JPS56143581A (en) 1980-04-09 1980-04-09 Memory circuit with bcd decoder

Country Status (1)

Country Link
JP (1) JPS56143581A (ja)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01143390A (ja) * 1987-11-30 1989-06-05 Yamada Mekki Kogyosho:Kk プリント配線基板

Also Published As

Publication number Publication date
JPS6236579B2 (ja) 1987-08-07

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