JPS56137620A - Manufacture of semiconductor - Google Patents
Manufacture of semiconductorInfo
- Publication number
- JPS56137620A JPS56137620A JP4048780A JP4048780A JPS56137620A JP S56137620 A JPS56137620 A JP S56137620A JP 4048780 A JP4048780 A JP 4048780A JP 4048780 A JP4048780 A JP 4048780A JP S56137620 A JPS56137620 A JP S56137620A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- substrate
- getter
- approximately
- defective
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
- 239000000758 substrate Substances 0.000 abstract 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 3
- 230000002950 deficient Effects 0.000 abstract 3
- 229910052710 silicon Inorganic materials 0.000 abstract 3
- 239000010703 silicon Substances 0.000 abstract 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 abstract 2
- 229910052581 Si3N4 Inorganic materials 0.000 abstract 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 abstract 1
- 230000007547 defect Effects 0.000 abstract 1
- 230000008021 deposition Effects 0.000 abstract 1
- 230000006866 deterioration Effects 0.000 abstract 1
- 238000009792 diffusion process Methods 0.000 abstract 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 abstract 1
- 239000010931 gold Substances 0.000 abstract 1
- 229910052737 gold Inorganic materials 0.000 abstract 1
- 239000012535 impurity Substances 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 229910052757 nitrogen Inorganic materials 0.000 abstract 1
- 239000001301 oxygen Substances 0.000 abstract 1
- 229910052760 oxygen Inorganic materials 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/2205—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities from the substrate during epitaxy, e.g. autodoping; Preventing or using autodoping
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Bipolar Transistors (AREA)
Abstract
PURPOSE:To prevent deterioration of characteristics by thermally treating the back of a silicon wafer covered by Si3N4 and providing a flawless layer on the front and a defective layer which reaches the back below the flawless layer. CONSTITUTION:SiO22 is provided on P type Si substrate 1 and then is opened to receive a deposition 3 of Sb, thus covering the front and back surfaces with SiO24. Then Si3N410 is provided by removing the back surface film 4 and thickness is held down to approximately 1,000Angstrom so that the generation of a bias in silicon and the increase of a differential in coefficient of thermal expansion are prevented. Next, it is treated in nitrogen at approximately 1,000 deg.C for 15hr or so to diffuse Sb3 deeply and thus form an imbedded layer 5. Following this process, Si3N410 is etched and the back of a silicon substrate 1 is etched approximately 2mum to remove Sb and getter impurities. Then SiO24 is removed and N- or P type Si layer 11 is epitaxially formed on the front to complete the imbedded diffusion layer 5. Inside the layer 11, a base and an emitter are provided. Under this constitution, oxygen is deposited (defect 7) on account of Si3N4 on the back of the substrate, resulting in the ''getting'' of gold. Thus a getter concentration is effectively reduced because the defective layer 8 extends from the center of the substrate to the back, so that the defective concentration lacking in quality is reduced, the rediffusion of a getter won't occur, improving properties.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4048780A JPS56137620A (en) | 1980-03-31 | 1980-03-31 | Manufacture of semiconductor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4048780A JPS56137620A (en) | 1980-03-31 | 1980-03-31 | Manufacture of semiconductor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS56137620A true JPS56137620A (en) | 1981-10-27 |
Family
ID=12581941
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4048780A Pending JPS56137620A (en) | 1980-03-31 | 1980-03-31 | Manufacture of semiconductor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS56137620A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6182437A (en) * | 1984-09-29 | 1986-04-26 | Toshiba Ceramics Co Ltd | Manufacture of semiconductor wafer |
| JPS63142822A (en) * | 1986-12-05 | 1988-06-15 | Matsushita Electronics Corp | Manufacture of semiconductor device |
| RU2680607C1 (en) * | 2018-01-23 | 2019-02-25 | Федеральное государственное бюджетное образовательное учреждение высшего образования "Кабардино-Балкарский государственный университет им. Х.М. Бербекова" (КБГУ) | Method for making semiconductor device |
-
1980
- 1980-03-31 JP JP4048780A patent/JPS56137620A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6182437A (en) * | 1984-09-29 | 1986-04-26 | Toshiba Ceramics Co Ltd | Manufacture of semiconductor wafer |
| JPS63142822A (en) * | 1986-12-05 | 1988-06-15 | Matsushita Electronics Corp | Manufacture of semiconductor device |
| RU2680607C1 (en) * | 2018-01-23 | 2019-02-25 | Федеральное государственное бюджетное образовательное учреждение высшего образования "Кабардино-Балкарский государственный университет им. Х.М. Бербекова" (КБГУ) | Method for making semiconductor device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US3746587A (en) | Method of making semiconductor diodes | |
| US4046606A (en) | Simultaneous location of areas having different conductivities | |
| JPS56137620A (en) | Manufacture of semiconductor | |
| JP2535645B2 (en) | Semiconductor substrate manufacturing method | |
| JPS6446937A (en) | Manufacture of semiconductor device | |
| JPS57197848A (en) | Semiconductor device and manufacture thereof | |
| JPS5923104B2 (en) | Manufacturing method for soft X-ray exposure mask | |
| JPS647625A (en) | Treating method for semiconductor substrate | |
| JPS5893343A (en) | Forming method for isolation region of semiconductor integrated circuit | |
| JPH08111409A (en) | Manufacturing for semiconductor device | |
| JPS5712588A (en) | Manufacture of buried type heterojunction laser element | |
| JPS5667966A (en) | Semiconductor device and preparation method thereof | |
| JPH0435898B2 (en) | ||
| JPH0311086B2 (en) | ||
| JPS55127018A (en) | Impurity diffusion into semiconductor substrate | |
| JPH0160932B2 (en) | ||
| JPS5544701A (en) | Manufacturing transistor | |
| JPS57170539A (en) | Manufacture of semiconductor device | |
| JPS6468922A (en) | Manufacture of semiconductor element | |
| JPS61290712A (en) | Manufacture of amorphous semiconductor film | |
| JPS56148823A (en) | Production of planer type semiconductor device | |
| JPS57143862A (en) | Manufacture of semiconductor integrated circuit | |
| JPS58155721A (en) | Method of diffusing impurity into semiconductor | |
| JPH0497533A (en) | Semiconductor substrate | |
| JPH06140411A (en) | Silicon substrate for semiconductor device |