JPS61290712A - Manufacture of amorphous semiconductor film - Google Patents

Manufacture of amorphous semiconductor film

Info

Publication number
JPS61290712A
JPS61290712A JP60132048A JP13204885A JPS61290712A JP S61290712 A JPS61290712 A JP S61290712A JP 60132048 A JP60132048 A JP 60132048A JP 13204885 A JP13204885 A JP 13204885A JP S61290712 A JPS61290712 A JP S61290712A
Authority
JP
Japan
Prior art keywords
amorphous silicon
silicon film
substrate
film
thickness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60132048A
Other languages
Japanese (ja)
Inventor
Masumitsu Ino
益充 猪野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP60132048A priority Critical patent/JPS61290712A/en
Publication of JPS61290712A publication Critical patent/JPS61290712A/en
Pending legal-status Critical Current

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

Landscapes

  • Photovoltaic Devices (AREA)

Abstract

PURPOSE:To manufacture a good-quality amorphous silicon film by controlling the quantity of a remaining surfactant on the surface of the substrate by carrying out a later treatment after a washing process. CONSTITUTION:The washed surface of a substrate is exposed in the atmosphere of glow discharge of a selected gas and a remaining impurity (especially nitrogen) on the surface of the substrate is removed by a post-treatment. In this case, the selected gas means, e.g., oxygen or hydrogen. The later treatment is done for approx. several minutes. Further, an amorphous silicon film is formed to the first thickness by glow discharge as the first stage and then an impurity such as oxygen or nitrogen mixed in the first thickness amorphous silicon film is removed by introducing a gas of CF4+O2 into a reaction chamber. Then, the amorphous silicon film is formed to a desired thickness without removing the vacuum in the reaction chamber. This enables to obtain a good-quality amorphous silicon film on the substrate.

Description

【発明の詳細な説明】 技術分野 本発明は絶縁性基板上に非晶質半導体膜を製造する方法
に関するものでアシ、更に詳細には、石英やアルミナ等
の基板上に非晶質シリコンを製造する方法に関するもの
である。
[Detailed Description of the Invention] Technical Field The present invention relates to a method for manufacturing an amorphous semiconductor film on an insulating substrate, and more specifically, a method for manufacturing amorphous silicon on a substrate such as quartz or alumina. It's about how to do it.

従来技術 等倍光センサ、薄膜トランジスタ、太陽電池等の各種デ
バイスに使用する為に比較的大きな面積を持った非晶質
シリコン膜を製造することが要求されている。この為に
1石英やアルミナ等の絶縁性基板上にグロー放電法等に
よシ非晶質シリコン膜を製造することが行なわれている
が、この場合、第1図に示した如く、基板1と製造され
る非晶質シリコン膜3との間に主に窒素を含有する残留
不純物層2が介在して形成され、非晶質シリコン膜3の
密着強度を低下させるばかシか、デバイスとしての電気
的特性も劣化されたものとなる。
BACKGROUND OF THE INVENTION It is required to manufacture amorphous silicon films having a relatively large area for use in various devices such as life-size optical sensors, thin film transistors, and solar cells. For this purpose, an amorphous silicon film is manufactured on an insulating substrate such as quartz or alumina by a glow discharge method or the like.In this case, as shown in FIG. A residual impurity layer 2 mainly containing nitrogen is formed interposed between the amorphous silicon film 3 and the amorphous silicon film 3 to be manufactured. The electrical characteristics are also deteriorated.

通常のCF4+02のグロー放電雰囲気中に露呈させる
ドライエッチでは、絶縁性基板、特に石英やアルミナ、
の表面のエッチは困難であシ、従って基板表面から残留
物質を除去することは不可能である。又、CF4+H2
のグロー放電雰囲気中に露呈する場合には、5iO20
表面をエッチすることができ、従って表面から残留不純
物を除去できるが、表面があらされるのでその表面上く
形成される膜との密着性及び電気的特性上の問題が発生
することは必至である。
Dry etching, which is exposed in a normal CF4+02 glow discharge atmosphere, is not suitable for insulating substrates, especially quartz and alumina.
It is difficult to etch the surface of the substrate and therefore it is impossible to remove residual material from the substrate surface. Also, CF4+H2
When exposed to a glow discharge atmosphere of 5iO20
Although the surface can be etched and residual impurities can be removed from the surface, problems with adhesion and electrical properties with films formed on the surface are inevitable because the surface is exposed. be.

目   的 本発明は以上の点に鑑みなされたものであって、上述し
た如き従来技術の欠点を解消し、密着強度及び電気的特
性を向上させることの可能な非晶質半導体膜の製造方法
を提供することを目的とする。
Purpose The present invention has been made in view of the above points, and provides a method for manufacturing an amorphous semiconductor film that can eliminate the drawbacks of the prior art as described above and improve adhesion strength and electrical properties. The purpose is to provide.

構成 本発明者は、鋭意研究の結果、絶縁性基板上に形成する
非晶質シリコン膜の密着強度が劣化しバラツキがあるの
は、主に基板表面上に存在する窒素の量、特にアミノ基
、アンモニアイオン等の界面活性剤に支配されることを
見い出した。この様な界面活性剤は、石英やアルミナ等
の基板上に非晶質シリコン膜を形成する前にその表面を
洗浄する洗浄工程で使用されるものであるが、本発明で
は、洗浄工程後に後処理を施して基板表面に残存する界
面活性剤の量を制御して、基板上に良質な非晶質シリコ
ン膜を製造する方法を提供している。
Structure As a result of extensive research, the inventor of the present invention found that the reason for the deterioration and dispersion in the adhesion strength of amorphous silicon films formed on insulating substrates is mainly due to the amount of nitrogen present on the substrate surface, especially the amino groups. , and found that it is dominated by surfactants such as ammonia ions. Such surfactants are used in a cleaning process to clean the surface of an amorphous silicon film before forming an amorphous silicon film on a substrate such as quartz or alumina. The present invention provides a method for manufacturing a high-quality amorphous silicon film on a substrate by controlling the amount of surfactant remaining on the surface of the substrate through treatment.

以下、添付の図面を参考に、本発明の具体的実質の態様
に付いて詳細に説明する。
Hereinafter, specific embodiments of the present invention will be described in detail with reference to the accompanying drawings.

石英、アルミナ等の絶縁性基板上に非晶質シリコン膜を
形成する場合、通常、反応室内に基板を位置させ、反応
室内に所定の反応ガスを導入してグロー放電を発生させ
、基板上に非晶質シリコンを付着形成させる。この場合
に1基板表面を界面活性剤で洗浄処理□してからグロー
放電によシ非晶質シリコン膜を形成する。本発明におい
ては、洗浄工程の後に、直ぐに非晶質シリコン膜を形成
せずに、洗浄した基板表面を選択したガスのグロー放電
雰囲気に露呈させて後処理を行ない、基板表面に残存す
る不純物(特に、窒素)を除去する。この場合の選択し
たガスとは、例えば酸素や水素を使用すると良い。
When forming an amorphous silicon film on an insulating substrate such as quartz or alumina, the substrate is usually placed in a reaction chamber, a prescribed reaction gas is introduced into the reaction chamber, a glow discharge is generated, and the film is deposited on the substrate. Amorphous silicon is deposited. In this case, the surface of one substrate is cleaned with a surfactant and then an amorphous silicon film is formed by glow discharge. In the present invention, after the cleaning process, instead of forming an amorphous silicon film immediately, the cleaned substrate surface is exposed to a glow discharge atmosphere of a selected gas for post-treatment to eliminate impurities remaining on the substrate surface. In particular, nitrogen) is removed. The selected gas in this case is preferably oxygen or hydrogen, for example.

又、この後処理は約数分間性なう。Also, this post-processing lasts for about several minutes.

更に、好適実施形態としては、上述した後処理を行なっ
た後に1第1段階として、グロー放電法によシ非晶質シ
リコン膜を第1厚さく約500X程度)K成膜させ、次
いでCF4+02(5゛チ)のガスを反応室内に導入し
て第1厚さの非晶質シリコン膜中に混入した酸素、窒素
等の不純物を取シ除く。次いで、そのまま反応室の真空
を解除することなしK、再度非晶質シリコン膜を所望の
厚さに成膜させる。この様なグロセスによ)、非晶質シ
リコン膜と基板との密着強度を一層向上させることが可
能となる。
Furthermore, in a preferred embodiment, after performing the above-mentioned post-treatment, as a first step, an amorphous silicon film is formed to a first thickness of about 500× by a glow discharge method, and then a CF4+02 (about 500×) film is formed. 5 cm) of gas is introduced into the reaction chamber to remove impurities such as oxygen and nitrogen mixed into the amorphous silicon film of the first thickness. Next, without releasing the vacuum in the reaction chamber, an amorphous silicon film is again formed to a desired thickness. With such gloss, it becomes possible to further improve the adhesion strength between the amorphous silicon film and the substrate.

本発明に基づいて製造した2例(例1及び例2)の非晶
質シリコン展の元素分析結果と膜特性を従来の方法(例
3)で製造したものと比較して第2図の表に示しである
。尚、ESCAは電子分光化学分析である。第2図の表
に示した結果から明らかな如く、従来例(例3)のもの
は本発明(例1及び例2)のものと比較して、剥離強度
のレベルが低いぼかシかバラツキも大きく、又光応答時
間(立ち上がシ時間)は約3倍の大きさとなっている。
The table in Figure 2 compares the elemental analysis results and film properties of amorphous silicon films manufactured according to the present invention (Example 1 and Example 2) with those manufactured by the conventional method (Example 3). This is shown below. Note that ESCA is electron spectrochemical analysis. As is clear from the results shown in the table of FIG. 2, the peel strength of the conventional example (Example 3) has a lower level of peel strength than that of the present invention (Examples 1 and 2). Also, the optical response time (rise time) is about three times as long.

尚、光応答時間の定義は、第3v!J(a)に示す如き
光ノ音ルスを照射した場合のta3図(b)に示した電
圧上昇時間時で示され、trは’minからVt= V
min + O* 9 (Vmaz−vrrlin)へ
上昇する時間である。
In addition, the definition of photoresponse time is 3rd v! It is shown at the voltage rise time shown in ta3 figure (b) when a photonoise pulse as shown in J (a) is irradiated, and tr is from 'min to Vt=V
It is the time to rise to min + O* 9 (Vmaz-vrrlin).

この様に従来例のものでは性能が劣っている理由は、基
板表面に残存す′る不純物としての窒素が主な原因と考
えられ、それが非晶質シリコン膜中に拡散して半導体膜
中にドナー準位を作る為と思われる。光による価電子帯
から伝導帯への電子の励起は、ドナーレベルのドラッグ
又はブトラップによシ起こシにくくなる。その為、伝導
帯にキャリアが発生し難くなシ、光電流はすぐに流れず
、応答時間trが大きくなる。
The reason why the performance of conventional products is inferior in this way is thought to be mainly due to nitrogen as an impurity remaining on the substrate surface, which diffuses into the amorphous silicon film and enters the semiconductor film. This seems to be to create a donor level in the . Excitation of electrons from the valence band to the conduction band by light is less likely to occur due to donor level drag or buttrap. Therefore, carriers are difficult to generate in the conduction band, photocurrent does not flow immediately, and the response time tr increases.

効果 以上、詳説した如く、本発明によれば、絶縁性基板と非
晶質シリコン膜との密着強度を増加させることが可能で
らシ、光応答時間を短縮することが可能である。更に、
特性の・々ラツキを減少させることが可能である。
Effects As described in detail above, according to the present invention, it is possible to increase the adhesion strength between the insulating substrate and the amorphous silicon film, and it is also possible to shorten the photoresponse time. Furthermore,
It is possible to reduce irregularities in characteristics.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来技術によシ製造した非晶質シリコン膜を示
した説明図、第2図は本発明と従来技術とを比較する表
を示した説明図、第3図(a)及び(b)は光応答時間
の定義を示した説明図、である。 (符号の説明) 1:絶縁性基板   2:残留不純物膜3:非晶質シリ
コン膜
FIG. 1 is an explanatory diagram showing an amorphous silicon film manufactured by the conventional technique, FIG. 2 is an explanatory diagram showing a table comparing the present invention and the conventional technique, and FIGS. b) is an explanatory diagram showing the definition of photoresponse time. (Explanation of symbols) 1: Insulating substrate 2: Residual impurity film 3: Amorphous silicon film

Claims (1)

【特許請求の範囲】 1、絶縁性基板上に非晶質半導体膜を製造する方法にお
いて、前記基板の表面を洗浄した後に選択した気体のグ
ロー放電中に所定時間露呈させ、前記表面上にグロー放
電法によつて非晶質半導体膜を製造することを特徴とす
る方法。 2、上記第1項において、前記非晶質半導体膜は非晶質
シリコン膜であり、又前記基板は石英又はアルミナで構
成されていることを特徴とする方法。 3、上記第1項又は第2項において、前記選択した気体
が酸素又は水素であることを特徴とする方法。 4、上記第3項において、前記非晶質シリコン膜を所定
の第1厚さに成膜した後に、CF_4+O_2(5%)
の混合ガスに露呈させて前記第1厚さの膜中に混入した
不純物を除去することを特徴とする方法。 5、上記第4項において、前記第1厚さは約500Åで
あることを特徴とする方法。 6、上記第4項又は第5項において、前記不純物除去の
工程の後反応室内の真空を解除せずに前記第1厚さの膜
上に再度第2厚さの非晶質シリコン膜を成膜することを
特徴とする方法。
[Claims] 1. In a method for manufacturing an amorphous semiconductor film on an insulating substrate, the surface of the substrate is cleaned and then exposed to a glow discharge of a selected gas for a predetermined period of time to form a glow on the surface. A method characterized by manufacturing an amorphous semiconductor film by a discharge method. 2. The method according to item 1 above, wherein the amorphous semiconductor film is an amorphous silicon film, and the substrate is made of quartz or alumina. 3. The method according to item 1 or 2 above, wherein the selected gas is oxygen or hydrogen. 4. In the above item 3, after forming the amorphous silicon film to a predetermined first thickness, CF_4+O_2 (5%)
A method characterized in that impurities mixed into the film of the first thickness are removed by exposing the film to a mixed gas of: 5. The method of item 4 above, wherein the first thickness is about 500 Å. 6. In the above item 4 or 5, after the step of removing impurities, an amorphous silicon film of a second thickness is formed again on the film of the first thickness without releasing the vacuum in the reaction chamber. A method characterized by forming a film.
JP60132048A 1985-06-19 1985-06-19 Manufacture of amorphous semiconductor film Pending JPS61290712A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60132048A JPS61290712A (en) 1985-06-19 1985-06-19 Manufacture of amorphous semiconductor film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60132048A JPS61290712A (en) 1985-06-19 1985-06-19 Manufacture of amorphous semiconductor film

Publications (1)

Publication Number Publication Date
JPS61290712A true JPS61290712A (en) 1986-12-20

Family

ID=15072302

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60132048A Pending JPS61290712A (en) 1985-06-19 1985-06-19 Manufacture of amorphous semiconductor film

Country Status (1)

Country Link
JP (1) JPS61290712A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63215081A (en) * 1987-03-04 1988-09-07 Mitsubishi Heavy Ind Ltd Manufacture of amorphous silicon solar cell
WO1998043304A1 (en) * 1997-03-21 1998-10-01 Sanyo Electric Co., Ltd. Photovoltaic element and method for manufacture thereof

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63215081A (en) * 1987-03-04 1988-09-07 Mitsubishi Heavy Ind Ltd Manufacture of amorphous silicon solar cell
WO1998043304A1 (en) * 1997-03-21 1998-10-01 Sanyo Electric Co., Ltd. Photovoltaic element and method for manufacture thereof
US6207890B1 (en) 1997-03-21 2001-03-27 Sanyo Electric Co., Ltd. Photovoltaic element and method for manufacture thereof
US6380479B2 (en) 1997-03-21 2002-04-30 Sanyo Electric Co., Ltd. Photovoltaic element and method for manufacture thereof

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