JPH11233449A - Manufacture of semiconductor substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve uniformity in the film thickness of a semiconductor layer and reduce the time required for manufacturing, in manufacturing a semiconductor substrate having a semiconductor layer electrically insulated from a base substrate provided on the base substrate. SOLUTION: A SOI substrate 8 is completed by carrying out (a) a first ion implantation step of implanting fluorine ions into a single crystal silicon substrate 1 having a contamination protective film 2 formed thereon and thus forming a crystal defect region 3, (b) a second ion implantation step of implanting hydrogen ions into the single crystal silicon substrate 1 and thus forming a peel-off element distribution layer 4 in the crystal defect region 3, (c) and (d) a bonding step of carrying out hydrophilic treatment on the surfaces of the single crystal silicon substrate 1 and a base substrate 5 and then bonding the substrates 1 and 5 on the hydrophilic-treated surfaces, (e) a peel-off step of peeling off the single crystal silicon substrate 1 at the part of the peel-off element distribution layer 4 by heat treatment and thus forming a single crystal silicon thin film 7, and (f) a planarization step of improving the surface roughness of the peel-off surface of the single crystal silicon thin film 7.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor substrate comprising a base substrate and a semiconductor layer for forming an element provided on the base substrate while being electrically insulated therefrom.

[0002]

2. Description of the Related Art As a semiconductor substrate of this kind, for example,
There is an SOI substrate in which a single crystal silicon thin film is provided as a semiconductor layer. Such an SOI substrate has been conventionally manufactured by various methods. As a method that can be manufactured relatively easily, a manufacturing method as described in Japanese Patent Application Laid-Open No. 5-211128 is known.

[0003] That is, in this manufacturing method, as a first step,
Hydrogen gas or rare gas is ion-implanted from the oxide film side into a single-crystal silicon substrate on which an oxide film for contamination protection is formed on the upper surface, so that implanted ions are distributed at a predetermined depth of the single-crystal silicon substrate. The formed ion implantation layer is formed.
Next, as a second step, a base substrate made of a silicon wafer covered with an insulating film is bonded to the surface of the single crystal silicon substrate on the ion implantation side by a bonding method or the like. Further, as a third step, by subjecting the integrated body of the single crystal silicon substrate and the base substrate to a heat treatment, a separation phenomenon occurs at a microvoid portion formed in the ion implantation layer as a boundary. Thus, an SOI substrate in a state where the single crystal silicon thin film is bonded to the base substrate with the insulating film interposed therebetween is formed.

[0004]

In the above manufacturing method, in order to form an ion-implanted layer in a single crystal silicon substrate in a state sufficient to cause a peeling phenomenon, an extremely large ion dose is required. (In the case of hydrogen ions, 1 × 10 ¹⁶ to 1 × 10 ¹⁷ atoms /
cm about ^2). For this reason, the throughput in the ion implantation process deteriorates, and a problem arises that it takes a long time to manufacture the SOI substrate.

On the other hand, the substrate peeling phenomenon is considered to be helium.
Hydrogen two-stage ion implantation technology (helium: 5 × 10 ¹⁵ atom
s / cm ² , hydrogen: 1.5 × 10 ¹⁶ atoms / cm ² ) (Proceedings of the 58th Annual Meeting of the Japan Society of Applied Physics (1997.10 / Akita University)) 2nd volume, p. 818, 3p-PB-2).
However, even if this technique is applied to the processing of an SOI substrate, the injection amount cannot be reduced much as compared with the case where only hydrogen is injected. Therefore, helium / hydrogen two-stage ion implantation is not always considered to be an effective technique from the viewpoint of throughput.

[0006] Generally, the distribution of ions implanted into a solid is distributed with a certain extent with respect to the average implantation depth. It is considered that the spread of the implantation depth affects the uniformity of the thickness of the thin film layer obtained by peeling the substrate. There are various factors that determine the spread of the implantation depth, but when the implantation amount is large, the spatial distribution of the implantation element is large, so that the spread in the depth direction is also large. Therefore, if the amount of implantation can be reduced, the uniformity of the thickness of the thin film obtained by peeling the substrate can be improved.

The present invention has been made to solve the above problems, and an object of the present invention is to reduce the amount of ion implantation or the number of implantation steps used in a substrate peeling step. In particular, it is an object of the present invention to provide a method for manufacturing a semiconductor substrate, which can significantly reduce the time required for manufacturing by reducing the amount of ion implantation, and in some cases, can improve the uniformity of the thickness of a peeled thin film.

[0008]

According to the first aspect of the present invention, in the first ion implantation step, relatively heavy ions are implanted from the surface of the semiconductor substrate material (1). Crystal defect regions (3, 12) distributed in a predetermined depth range are formed, and in the second ion implantation step performed after or before the execution of the first ion implantation step, the semiconductor substrate material (1) is formed. Ions different from those of the first ion implantation step are implanted from the surface of
A separation element distribution layer (4) for causing a separation phenomenon of the semiconductor substrate material (1) is formed in the crystal defect regions (3, 12).

Next, in the bonding step, after the base substrate (5) and the semiconductor substrate material (1) are bonded, a heat treatment is performed in a peeling step. Along with such a heat treatment, the pressure increase of the microbubbles generated in the portion of the element distribution layer for separation (4) in the semiconductor substrate material (1) causes the separation with the boundary of the element distribution layer for separation (4) as a boundary. Occurs. As a result, a semiconductor layer (7) for element formation can be formed in a thin film shape on the base substrate (5).

According to such a manufacturing method, in the first ion implantation step, the crystal defect regions (3, 12) are formed efficiently by implantation of relatively large weight ions. There is no need to increase the dose.
In the second ion implantation step, when ions different from those in the first ion implantation step are implanted into the crystal defect regions (3, 12) to form the separation element distribution layer (4), It is considered that the dose required to cause the peeling phenomenon in the semiconductor substrate material (1) is significantly reduced as compared with the case where only the peeling element distribution layer is formed by the ions.

Therefore, the first ion implantation step and the second ion implantation step are performed.
Although the ion implantation step is performed, the dose in each ion implantation step can be greatly reduced as compared with the case where the stripping element distribution layer is formed by one ion implantation. As a result, the throughput in the first and second ion implantation steps is improved, and the semiconductor substrate (8, 16)
Can significantly reduce the time required for the production of When the second ion implantation step is performed after the first ion implantation step, that is, the separation element distribution layer (4) is formed later in the crystal defect regions (3, 12). In the case of the above, the element distribution layer for stripping (4)
Of the depth position (observed value is in the range of ± 3σ) is 1
It has been experimentally found that the size of the element distribution layer is reduced to about 1/3 as compared with the case where the separation element distribution layer is formed by one ion implantation. Therefore, if the first and second ion implantation steps are performed in this order, the depth position of the separation element distribution layer (4) is stable for each lot of the semiconductor substrate material (1) to be ion-implanted. As a result, the uniformity of the film thickness of the semiconductor layer (7) can be improved.

According to the method of manufacturing a semiconductor substrate of the present invention, in the ion implantation step, relatively heavy ions are implanted from the surface of the semiconductor substrate material (1) and distributed in a predetermined depth range. A defect region (3) is formed, and in the subsequent diffusion step, the above-mentioned element is converted into the crystal by the heat treatment at a temperature lower than the temperature at which the semiconductor substrate material (1) causes the delamination phenomenon. The separation element distribution layer (17) is taken in the defect region (3) and located in the crystal defect region (3).

Next, in the bonding step, after the base substrate (5) and the semiconductor substrate material (1) are bonded, a heat treatment is performed in a peeling step. Along with such a heat treatment, the pressure increase of the microbubbles generated in the separation element distribution layer (17) in the semiconductor substrate material (1) causes separation with the separation element distribution layer (17) as a boundary. Occurs. As a result, the base substrate (5)
The semiconductor layer (7) for forming an element can be formed in a thin film thereon.

According to such a manufacturing method, in the ion implantation step, the crystal defect region (3) is formed efficiently by implantation of relatively large weight ions.
It is not necessary to increase the dose. Substrate separation is achieved by a configuration in which a diffusion step is performed after this ion implantation step, that is, a configuration in which a separation element distribution layer (17) is formed later in the crystal defect region (3).

According to the method of manufacturing a semiconductor substrate according to the present invention, in the ion implantation step, relatively heavy ions are implanted from the surface of the semiconductor substrate material (1) and distributed in a predetermined depth range. A defect region (3) is formed and a semiconductor substrate material (1)
A hydrogenated amorphous semiconductor film (18) is formed thereon. Then, in the subsequent diffusion step, the semiconductor substrate material (1) is diffused from the hydrogenated amorphous semiconductor film (18) according to the heat treatment at a temperature lower than the temperature at which the peeling phenomenon occurs. The resulting hydrogen is taken into the crystal defect region (3) to form a stripping element distribution layer (17) located in the crystal defect region (3).

Next, in a bonding step, after the base substrate (5) and the semiconductor substrate material (1) are bonded, a heat treatment is performed in a peeling step. Along with such a heat treatment, the pressure increase of the microbubbles generated in the separation element distribution layer (17) in the semiconductor substrate material (1) causes separation with the separation element distribution layer (17) as a boundary. Occurs. As a result, the base substrate (5)
The semiconductor layer (7) for forming an element can be formed in a thin film thereon.

According to such a manufacturing method as well, in the ion implantation step, the crystal defect region (3) is efficiently formed by implanting relatively large weight ions, so that the dose amount needs to be increased. Disappears. Further, after a film forming step of the hydrogenated amorphous semiconductor film (18) serving as a hydrogen supply source is performed, a diffusion step of taking in the hydrogen into the crystal defect area (3) is performed, that is, the crystal defect area (3) is formed. The substrate peeling is achieved by the structure in which the peeling element distribution layer (17) is formed later during the step ()).

According to a tenth aspect of the present invention, in the ion implantation step, relatively heavy ions are implanted from the surface of the semiconductor substrate material (1) and distributed in a predetermined depth range. The defect region (3) is formed, and a hydrogenated amorphous semiconductor film (19) is formed on the base substrate (5) in the film forming process. Thereafter, in a bonding step, the base substrate (5)
The surface on the side of the hydrogenated amorphous semiconductor film (19) is bonded to the semiconductor substrate material (1). further,
In the diffusion step, the semiconductor substrate material (1) is formed on the integrated body of the base substrate (5) and the semiconductor substrate material (1).
In accordance with the heat treatment at a temperature lower than the temperature at which the peeling phenomenon occurs in the hydrogenated amorphous semiconductor film (1),
9) Hydrogen diffused from inside is taken into the crystal defect region (3), and a stripping element distribution layer (17) positioned in the crystal defect region (3) is formed.

Next, as the heat treatment is performed in the stripping step, the pressure rise of the microbubbles generated in the portion of the stripping element distribution layer (17) in the semiconductor substrate material (1) causes the stripping element distribution layer to rise. (17) Peeling occurs at the boundary. As a result, a semiconductor layer (7) for element formation can be formed in a thin film shape on the base substrate (5).

According to such a manufacturing method as well, in the ion implantation step, the crystal defect region (3) is efficiently formed by ion implantation of a relatively large weight, and the dose thereof needs to be increased. Disappears. Further, a film forming step of forming a hydrogenated amorphous semiconductor film (19) serving as a hydrogen supply source on the base substrate (5) side, and a bonding step of bonding the base substrate (5) and the semiconductor substrate material (1) Is performed, a diffusion step of taking in hydrogen in the hydrogenated amorphous semiconductor (19) into the crystal defect region (3) is performed, that is, a separation element distribution layer for separation is later provided in the crystal defect region (3). With the configuration in which (17) is formed, substrate peeling is achieved.

According to a twelfth aspect of the present invention, in the ion implantation step, from the surface of the semiconductor substrate material (1), hydrogen and hydrogen composed of a compound of a relatively large crystal defect forming element are used. Defect region (20) composed of the above-described crystal defect forming element distributed in a predetermined depth range in accordance with the implantation of the oxidized molecular ions, and a stripping region composed of hydrogen located in the crystal defect region (20). An element distribution layer (21) is formed. Then, in the bonding step, after the base substrate (5) and the semiconductor substrate material (1) are bonded, heat treatment is performed in the peeling step, so that the peeling element distribution in the semiconductor substrate material (1) is obtained. Due to the pressure rise of the microbubbles generated in the layer (21), peeling occurs at the boundary of the peeling element distribution layer (21). As a result, the base substrate (5)
The semiconductor layer (7) for forming an element can be formed in a thin film thereon.

According to such a manufacturing method, the crystal defect region (20) due to the relatively heavy element and the exfoliation due to the hydrogen located in the crystal defect region (20) are obtained by one ion implantation step. The element distribution layer (21) is formed simultaneously, and the crystal defect region (20) and the element distribution layer (21) made of different elements are thus formed.
As a result, it is not necessary to increase the dose of ions. For this reason, the throughput in the ion implantation step is improved, and it is not necessary to perform the ion implantation in a plurality of times.
Can significantly reduce the time required for the production of

[0023]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) FIGS. 1 and 2 show a first embodiment in which the present invention is applied to a method for manufacturing an SOI substrate, which will be described below. FIG.
FIG. 1 shows a schematic cross-sectional view of a basic process for manufacturing an SOI substrate. That is, in the first ion implantation step shown in FIG. 1A, a contamination protection film 2 made of a silicon oxide film is formed on a single crystal silicon substrate 1 (corresponding to a semiconductor substrate material in the present invention) by thermal oxidation or the like. After the film is formed, the surface of the single crystal silicon substrate 1 is brought into a predetermined depth range by implanting, for example, fluorine ions from the contamination protection film 2 side into the single crystal silicon substrate 1 as shown by an arrow in the figure. The crystal defect regions 3 distributed in a parallel state are formed.

In this case, the dose of fluorine ions is 1
× 10 ¹⁴ atoms / cm ² or more, preferably 1 × 10 ¹⁵
Set to atoms / cm ² or more. Further, the ion implantation energy is set according to the depth at which the crystal defect region 3 is formed. Specifically, fluorine ions are implanted,
For example, to obtain a distribution state in which a peak is formed at a depth of about 450 nm in the single crystal silicon substrate 1,
The implantation energy is set to about 200 KeV.

The ion used in the first ion implantation step is fluorine if it is an ion species other than hydrogen and helium which has a relatively large ion weight and can be desorbed from single crystal silicon in accordance with heat treatment. The material is not limited, and any material that does not adversely affect the single crystal silicon substrate 1 may be used. Therefore, for example, chlorine, silicon, or a rare gas such as neon, argon, or xenon can be used. The contamination protective film 2 is formed by thermal oxidation or CV.
It is formed to have a uniform film thickness (preferably about 50 to 100 nm) by a deposition method such as the D method or the PVD method, but may be provided as needed.

Thereafter, in a second ion implantation step shown in FIG. 1B, the first
By implanting ions, for example, hydrogen ions, which are different from the ion implantation process of step (a), a separation element distribution layer 4 for causing a separation phenomenon of the single crystal silicon substrate 1 is formed in the crystal defect region 3. The separation element distribution layer 4 is formed so as to be distributed in a state parallel to the surface of the single crystal silicon substrate 1.

In this case, the dose of hydrogen ions is 5 ×
10 ¹⁵ atoms / cm ² or more, preferably 1 × 10 ¹⁶ at
Set to oms / cm ² or more. It is desirable that the ion implantation energy be set so that the concentration peak of the stripping element distribution layer 4 formed at this time matches the concentration peak of the crystal defect region 3. Specifically, when hydrogen ions are implanted to obtain a distribution state in which a peak is formed at the same depth as the crystal defect region 3 (a depth of about 450 nm of the single crystal silicon substrate 1), About 50 KeV
It will be set to about the implantation energy.

Here, the dose amount of fluorine ions in the first ion implantation step is 1 × 10 ¹⁵ atoms / cm ² , the ion implantation energy is about 200 KeV, and the hydrogen ion Dose amount 1 × 10 ¹⁶
atoms / cm ² and its ion implantation energy is about 50 Ke
When V is set, the profile of the concentration distribution of fluorine and hydrogen in the single crystal silicon substrate 1 is as shown in FIG.

When the concentration peaks of the crystal defect region 3 and the separation element distribution layer 4 are substantially coincident with each other, the single crystal silicon substrate 1 is subjected to heat treatment in a separation step described later. The dose required to cause the phenomenon of exfoliation in the exfoliation element distribution layer 4 portion is as described above (fluorine ion: 1 × 10 ¹⁵ at)
oms / cm ² , hydrogen ion: 1 × 10 ¹⁶ atoms / cm ² )
Is enough. In the second ion implantation step,
In addition to hydrogen atomic ions or molecular ions, atomic ions or molecular ions of a rare gas such as helium can be used.

After the execution of the second ion implantation step,
The bonding step shown in FIGS. 1C and 1D is performed.
In this bonding step, first, the single-crystal silicon substrate 1
The above contamination protection film 2 is entirely removed by, for example, chemical etching using a hydrofluoric acid aqueous solution, mechanical polishing or dry etching, and the surface on the ion implantation side is exposed.
Next, a base substrate 5 made of, for example, a single crystal silicon substrate is prepared, and an insulating film 6 made of a silicon oxide film having a uniform thickness is formed on the base substrate 5 by thermal oxidation, CVD, or the like. The insulating film 6 becomes an insulating separation film when the SOI structure is finally formed, and its thickness is set to a value corresponding to the design shape of the SOI substrate.

Further, the surface of the single crystal silicon substrate 1 on the ion implantation side and the surface of the base substrate 5 on the side of the insulating film 6 are subjected to a hydrophilic treatment. Specifically, for example, 90 to 120 ° C.
A mixed solution of sulfuric acid and hydrogen peroxide solution (H
After sequentially performing cleaning with 2 SO4: H2 O2 = 4: 1) and cleaning with pure water, the amount of water adsorbed on the surfaces of the substrates 1 and 5 is controlled by spin drying. And after this,
The single-crystal silicon 1 and the base substrate 5 are attached to each other in close contact with the above-mentioned hydrophilized surface. Thereby, each substrate 1 and 5
Are bonded by hydrogen bonding between silanol groups formed on each surface and water molecules adsorbed on the surfaces.

In this embodiment, the contamination protection film 2 on the single crystal silicon substrate 1 is entirely removed. However, only the surface of the contamination protection film 2 is removed to use it as a bonding surface. When such a contamination protection film 2 can be used as an insulation separation film in an SOI structure, it is not necessary to form an insulation film 6 on the base substrate 5 side.

After execution of the above-mentioned bonding step, FIG.
The peeling step shown in (e) is performed. In this separation step, the single-crystal silicon substrate 1 and the base substrate 5 are subjected to a heat treatment to separate the single-crystal silicon substrate 1 at the separation element distribution layer 4 portion. An SOI structure in which a single crystal silicon thin film 7 (corresponding to a semiconductor layer in the present invention) is stacked on a base substrate 5 with an insulating film 6 interposed therebetween is formed.

At this time, specifically, when the separation element distribution layer 4 is formed by implanting hydrogen ions as in this embodiment, heat treatment is performed at about 500 to 600 ° C. Is preferred. By such heat treatment,
The pressure of the microbubbles generated by the hydrogen arranged in the separation element distribution layer 4 formed in the crystal defect region 3 increases, and accordingly, the separation element distribution layer 4 portion is used as a boundary. Peeling will occur.

After the execution of the peeling step, a heat treatment step is subsequently performed. In this heat treatment step, the temperature is higher than the heat treatment temperature in the peeling step (1000 ° C. or higher, preferably 1 ° C. or more).
By performing a heat treatment of about 150 ° C. to 1200 ° C.), the bonding strength of the bonding surface is strengthened, the part of the separation element distribution layer 4 that caused the separation is relaxed, and the fluorine constituting the crystal defect region 3 is removed. Promotes desorption from the crystal structure.

In this case, a defect layer formed by the ion implantation remains on the peeled surface of the single crystal silicon thin film 7 as described above, and a minute step is generated. Therefore, in the present embodiment, a flattening step of improving the surface roughness by removing the defect layer and the minute steps by performing chemical mechanical polishing on the peeled surface (see FIG. 1F). Is performed, so that an SOI substrate 8 (corresponding to a semiconductor substrate in the present invention) as shown in FIG. 1F is finally completed. However, the above-mentioned flattening step may be performed as needed.

It should be noted that the single crystal silicon thin film 7
The single-crystal silicon substrate 1 from which the part has been separated is subjected to, for example, a heat treatment step of desorbing fluorine from the remaining crystal defect region 3 and a regeneration flattening step of flattening the separated surface. It is reused for manufacturing another SOI substrate.

According to the method for manufacturing the SOI substrate 8 described above, in the first ion implantation step, relatively heavy ions (fluorine ions in this embodiment) capable of efficiently forming crystal defects are implanted. Accordingly, since the crystal defect region 3 is formed, it is not necessary to increase the dose. In addition, in accordance with the execution of the second ion implantation step, ions (hydrogen ions in this embodiment) different from those in the first ion implantation step are implanted into the crystal defect region 3 so that the separation element distribution layer 4 is formed. It is known that when formed, the dose required to cause the separation phenomenon in the single crystal silicon substrate 1 is significantly reduced as compared with the case where only the separation element distribution layer 4 is formed by the hydrogen ions. ing.

For this reason, the first ion implantation step and the second
Although the ion implantation step is performed, the dose in each ion implantation step can be greatly reduced as compared with the case where the stripping element distribution layer is formed by one ion implantation.

This will be described below with reference to a concrete example. That is, as in the conventional case, when only a hydrogen ion is implanted into a single crystal silicon substrate to form a separation element distribution layer, a reliable separation phenomenon occurs in the separation element distribution layer according to the heat treatment. For example, it is desirable to set the dose to about 8 × 10 ¹⁶ atoms / cm ² . On the other hand, in the manufacturing method according to the present embodiment, the dose of fluorine ions for the crystal defect region 3 is 1 × 10 ¹⁵ atoms in order to cause a reliable separation phenomenon in the separation element distribution layer 4. / Cm ² , and the dose of hydrogen ions for the element distribution layer 4 for stripping is 1 ×
It has been experimentally found that only about 10 ¹⁶ atoms / cm ² is required.

The first ion implantation step and the second
The total ion implantation time when performing the ion implantation step of (1) is about 0.45 hours (actually, about 5 to 10 minutes are required for switching between each step), Requires about 3.2 hours of hydrogen ion implantation time. Therefore, according to the manufacturing method of the present embodiment,
Throughput through the first and second ion implantation steps is significantly improved as compared with the conventional manufacturing method in which only hydrogen ions are implanted, and the time required for manufacturing the SOI substrate 8 can be significantly reduced. become.

In the case where the second ion implantation step is performed after the first ion implantation step as in this embodiment, that is, the separation element distribution layer 4 is formed in the crystal defect region 3 later. Is formed, the variation in the depth position of the stripping element distribution layer 4 (observed value is in a range of ± 3σ) is 1/3 as compared with the case where the crystal defect region 3 is not formed.
It is experimentally known to be as small as possible. This is due to the fact that the substrate is peeled with a small amount of ion implantation, and the uniformity of the thickness of the single crystal silicon thin film 7 can be improved. In the first embodiment, the first
The ion implantation step and the second ion implantation step may be performed in reverse order.

(Second Embodiment) FIGS. 3 and 4 show a second embodiment of the present invention. Only the portions different from the first embodiment will be described below. still,
FIGS. 3 and 4 are schematic cross-sectional views showing the basic steps in the case of manufacturing an SOI substrate in the same manner as in FIG. That is, the second embodiment provides a manufacturing method suitable for forming a buried pattern structure (for example, a back gate for an element such as an FET) between a base substrate and a single crystal silicon thin film in an SOI substrate. It is intended to be disclosed.

First, in a pattern structure forming step shown in FIG. 3A, a silicon oxide film to be finally formed into an insulating film 9 (see FIG. 4J) is formed on the surface side of the single crystal silicon substrate 1 by thermal oxidation or the like. The film 9a is formed. Subsequently, after polycrystalline silicon is deposited by a CVD method or the like, the deposited film is patterned by photolithography and etching to form a polycrystalline silicon film 10 having a predetermined shape. Further, a silicon oxide film 9b which will eventually become the insulating film 9 is deposited by a CVD method or the like, thereby forming a buried pattern structure 11.

Next, in a first ion implantation step shown in FIG. 3B, for example, fluorine ions are implanted into the single crystal silicon substrate 1 from the side of the buried pattern structure 11 as shown by arrows in the figure. Thereby, crystal defect regions 12 distributed in a predetermined depth range are formed. The crystal defect region 12
Becomes wavy due to the presence of the buried pattern structure 11. In this case, the dose amount of fluorine ions is 1 ×
10 ¹⁴ atoms / cm ² or more, preferably 1 × 10 ¹⁵ at
Set to oms / cm ² or more. The ion implantation energy is set according to the depth at which the crystal defect region 12 is formed.

Thereafter, as shown in FIGS. 3 (c) and 3 (d), a second step for implanting, for example, hydrogen ions, which are different from the first ion implantation step, into the single crystal silicon substrate 1 is performed. The second ion implantation step is performed twice. That is, in order to form the separation element distribution layer 4 distributed in a state parallel to the surface of the single crystal silicon substrate 1 in the crystal defect region 12, it is necessary to change the ion implantation depth due to the difference in the structure of the ion implantation region. Therefore, it is necessary to control the ion implantation energy in consideration of the above, so that the second ion implantation step is performed in two steps.

Specifically, in the second ion implantation step,
First, as shown in FIG.
Polysilicon film 1 in buried pattern structure 11 above
A resist pattern 13 of a photoresist is formed in a portion corresponding to 0, and a first ion implantation of hydrogen is performed in this state to form an ion-implanted region 4a. Next, as shown in FIG. 3D, after the resist pattern 13 is peeled off, a resist pattern 14 of a photoresist is formed on a portion of the buried pattern structure 11 which does not correspond to the polycrystalline silicon film 10, and in this state, The second implantation of hydrogen ions is performed in a state where the ion implantation energy is larger than that of the first implantation, thereby forming the ion implantation region 4b. The dose of hydrogen ions is 5
× ^{10 1 5} atoms / cm ² or more, preferably 1 × ^{10 16}
Set to atoms / cm ² or more. The resist pattern 14 is peeled off after the ion implantation.

In this case, the first and second ion implantation energies are set so that the concentration peaks of the ion implantation regions 4a and 4b have the same depth. Single crystal silicon substrate 1
The element distribution layer 4 for stripping distributed in a state parallel to the surface is formed.

In this case, the crystal defect region 12 formed by the implantation of fluorine ions is wavy. However, as shown in FIG. Since the concentration distribution changes relatively slowly with respect to the change in the depth, no great hindrance occurs. That is, the crystal defect region 12
If the concentration is at least 1 × 10 ¹⁹ atoms / cm ^{3, the} intended purpose can be achieved. Therefore, in the wavy crystal defect region 12, a state parallel to the surface of the single-crystal silicon substrate 1 is obtained. Even if the stripping element distribution layer 4 is formed, there is no problem.

By performing the first ion implantation step twice in the same manner as in the second ion implantation step as described above, the single-crystal silicon substrate 1 can be placed in a predetermined depth range. A configuration in which crystal defect regions distributed in a state parallel to the surface may be formed.

Next, in the step of forming a flattening film shown in FIG. 3E, the buried pattern structure 11 is made of polycrystalline silicon, amorphous silicon, silicon oxide, or the like by using a CVD method or a PVD method. A flattening film 15 is formed. Thereafter, in the bonding surface forming step shown in FIG. 3F, the surface of the flattening film 15 is polished to remove a surface step caused by the buried pattern structure 11 serving as a base. The surface is flattened.

Thereafter, a bonding step shown in FIGS. 4G and 4H is performed. In this bonding step, first, the surface of the planarization film 15 on the single crystal silicon substrate 1 and the surface of the base substrate 5 are subjected to the same hydrophilic treatment as in the first embodiment. Then, after that, the single crystal silicon 1 and the base substrate 5 are closely attached to each other on the hydrophilized surface to be bonded. As a result, the substrates 1 and 5 are adhered by a hydrogen bond between the silanol groups formed on the respective surfaces and the water molecules adsorbed on the surfaces.

After execution of the above-mentioned bonding step, FIG.
The peeling step shown in (i) is performed. In this separation step, the single-crystal silicon substrate 1 and the base substrate 5 are integrated with each other.
By performing the same heat treatment as in the first embodiment, the single-crystal silicon substrate 1 is separated at the separation element distribution layer 4 part, whereby the embedded pattern structure 11 and the like are formed on the base substrate 5. As a result, an SOI structure in which the single crystal silicon thin films 7 are stacked is formed.

After the peeling step is performed, a heat treatment step (the processing conditions are the same as in the first embodiment) is subsequently performed to enhance the bonding strength of the bonded surface and to perform the peeling that caused the peeling. This promotes relaxation of the element distribution layer 4 and desorption of fluorine constituting the crystal defect region 12 from the crystal structure. Further, a flattening step (see FIG. 4 (j)) of subjecting the peeled surface to chemical mechanical polishing is executed, and finally the buried pattern structure 11 as shown in FIG. 4 (j) is formed. The provided SOI substrate 16 (corresponding to the semiconductor substrate in the present invention) is completed. Note that the above-mentioned flattening step may be performed as needed.

According to the present embodiment configured as described above,
The same effects as in the first embodiment can be obtained. In particular, according to the present embodiment, the bonding surface between the single crystal silicon thin film 7 and the buried pattern structure 11 in the SOI substrate 16 is the single crystal silicon substrate 1 and the silicon formed on the surface thereof by thermal oxidation or the like. Since this corresponds to the interface with the oxide film 9a, the interface can be made stable and the characteristics of the SOI substrate can be improved.

In the second embodiment, the buried pattern structure 11 is formed on the single crystal silicon substrate 1 in the pattern structure forming step. A pattern structure forming step of forming a buried pattern structure by performing processing on the side is performed, and thereafter, a flattening film forming step, a bonding surface forming step, a bonding step, a peeling step, etc. are similarly performed. Thereby, the buried pattern structure may be provided between the base substrate 5 and the single-crystal silicon thin film 7. In this case, as in the second embodiment, the second ion implantation step is performed in two steps.
There is no need to perform it in separate times.

(Third Embodiment) FIG. 5 shows a third embodiment of the present invention. Only the portions different from the first embodiment will be described below. In addition, FIG.
FIG. 2 is a schematic cross-sectional view showing a basic process in the case of manufacturing an SOI substrate as in FIG.

That is, in the ion implantation step shown in FIG. 5A, similarly to the first ion implantation step in the first embodiment, contamination of a silicon oxide film on the single crystal silicon substrate 1 by thermal oxidation or the like is performed. After the protection film 2 is formed, the single crystal silicon substrate 1 is implanted with, for example, fluorine ions from the contamination protection film 2 side as shown by an arrow in the drawing, so that the single crystal silicon substrate 1 has a predetermined depth range. Crystal defect regions 3 distributed in a state parallel to the surface of No. 1 are formed.

Thereafter, in the diffusion step shown in FIG.
In an atmosphere containing, for example, hydrogen gas, which is an element different from the ion element (fluorine) implanted in the ion implantation step, the temperature is lower than the lower limit of the temperature (about 500 ° C. or higher) at which the single crystal silicon substrate 1 peels off. A temperature heat treatment is performed. The hydrogen gas atmosphere may be formed, for example, by flowing hydrogen as a carrier gas into an air chamber at an atmospheric pressure or a reduced pressure (including a vacuum state).

In response to such a heat treatment, hydrogen is taken into the crystal defect region 3 from a hydrogen gas atmosphere, whereby a high-concentration portion (crystal defects are relatively The stripping element distribution layer 17 in a state intensively formed is formed on the (large portion). in this case,
The hydrogen concentration of the stripping element distribution layer 17 is 1 × 10 ²⁰ atom
It is desirable to set s / cm ³ or more.

The heat treatment time required for forming the above-described separation element distribution layer 17 (the time required for the diffusion step).
Can be derived from the following relation: That is, for example, "Hy by SJPearton, JWCorbett, M. Stavola
drogen in Crystalline Semiconductors ”, Springer-Ve
As described in rlag (October 1991), the average value of the diffusion length X (cm) when diffusing impurities into silicon by heat treatment is given by X = (D · t) ^1/2 Can be Here, D is the diffusion coefficient (cm ² / sec), t
Is the heat treatment time (sec). The diffusion coefficient D is given by the following equation.

D = D0.exp (-Ea / kT) where D0 is the value of D when the temperature is infinite and D0 =
4.2 × 10 ⁻⁵ (cm ² / sec), Ea is activation energy (= 0.56 (eV)), k is Boltzmann coefficient (=
8.667 × 10 ^-5 (eV / K)), T is temperature (K)
It is.

For example, when the heat treatment temperature is 200 ° C. and the thickness of the contamination protective film 2 is 100 nm, the heat treatment time when hydrogen is diffused into the single crystal silicon substrate 1 to a depth of 400 nm is determined. If it is roughly assumed that the diffusion coefficient in the silicon oxide film constituting the protective film 2 is also substantially the same, according to the calculations based on the above-mentioned relational expressions, it is sufficient to perform the heat treatment for about 1.5 hours. I understand.

On the other hand, after the above-described diffusion step is performed, the bonding step shown in FIGS. 5C and 5D is performed in the same manner as in the first embodiment, and the single-crystal silicon substrate 1 and the base substrate 5 and then, the single crystal silicon substrate 1 is separated at the separation element distribution layer 17 by performing the separation step shown in FIG. 5E in the same manner as in the first embodiment to form an SOI structure. I do. Further, a high-temperature heat treatment step is performed in the same manner as in the first embodiment after the peeling step is performed, so that the bonding strength of the bonding surfaces of the substrates 1 and 5 is strengthened, and the crystal structure of fluorine constituting the crystal defect region 3 is reduced. After promoting the desorption from the substrate, the planarization process shown in FIG. 5F is performed in the same manner as in the first embodiment, and the SOI substrate 8 is completed.

Also in the manufacturing method according to the third embodiment, in the ion implantation step, the crystal defect region 3 is formed by implanting relatively heavy fluorine ions capable of efficiently forming crystal defects. It is not necessary to increase the dose, and the time required for the ion implantation step is reduced. Further, the time required for the diffusion step performed thereafter is only about 1.5 hours under the above-described conditions, and the throughput through the ion implantation step and the diffusion step is limited to only the implantation of hydrogen ions. SOI is improved as compared with the conventional manufacturing method.
The time required for manufacturing the substrate 8 can be reduced.

In the third embodiment, the heat treatment in the diffusion step is performed in a hydrogen gas atmosphere. However, the heat treatment in the diffusion step may be performed in a vacuum atmosphere in which hydrogen is converted into plasma. The element used in the diffusion step is not limited to hydrogen, but may be a rare gas such as helium, NH4, CH4, or H2O.
Such a hydride may be used.

(Fourth Embodiment) FIG. 6 shows the third embodiment.
A fourth embodiment of the present invention having substantially the same effects as the embodiment is shown, and only the portions different from those of the first and third embodiments will be described below. FIG.
FIG. 2 is a schematic cross-sectional view showing a basic process in the case of manufacturing an SOI substrate in the same manner as in FIG.

That is, in the ion implantation step shown in FIG. 6A, similarly to the first ion implantation step in the first embodiment, contamination of a silicon oxide film on the single crystal silicon substrate 1 by thermal oxidation or the like is performed. After the protection film 2 is formed, the single crystal silicon substrate 1 is implanted with, for example, fluorine ions from the contamination protection film 2 side as shown by an arrow in the drawing, so that the single crystal silicon substrate 1 has a predetermined depth range. Crystal defect regions 3 distributed in a state parallel to the surface of No. 1 are formed.

Next, in the film forming step shown in FIG. 6B, the contamination protection film 2 is left or removed (FIG. 6).
(B) The following example shows a state in which the hydrogenated amorphous silicon film 1 is formed on the single crystal silicon substrate 1.
8 (corresponding to the hydrogenated amorphous semiconductor film in the present invention)
To form Specifically, the hydrogenated amorphous silicon film 18 is formed of a silicon-based gas source (eg, SiH
4 is deposited under a condition of, for example, 350 ° C. and 0.5 torr by a high-frequency plasma CVD method using Ar or H 2 diluted gas, and its hydrogen concentration is, for example, 5 × 10 5
It is about ²¹ atoms / cm ³ . Further, the thickness of the hydrogenated amorphous silicon film 18 may be set to about 10 nm or more when the hydrogen concentration is in the above state.

Thereafter, in the diffusion step shown in FIG.
The single crystal silicon substrate 1 is subjected to a heat treatment at a temperature lower than the lower limit of the temperature at which the separation phenomenon occurs (about 500 ° C. or higher). In response to such a heat treatment, hydrogen diffused in a solid phase from the hydrogenated amorphous silicon film 18 is taken into the crystal defect region 3, and thereby, a high concentration portion (crystal defect) in the crystal defect region 3 is obtained. Element distribution layer 17 in a state where the element distribution layer 17 is concentrated
Is formed. In this case, it is desirable to set the hydrogen concentration of the stripping element distribution layer 17 to 1 × 10 ²⁰ atoms / cm ³ or more. In addition, the heat treatment time required for forming the above-described separation element distribution layer 17 (the time required for the diffusion step).
Is considered to be substantially equal to the heat treatment time in the diffusion step in the third embodiment.

After the above-described diffusion step is performed, a removing step of removing the hydrogenated amorphous silicon film 18 using, for example, a TMAH or hydrofluoric-nitric acid-based etchant is performed. The bonding step shown in (1) is performed in the same manner as in the first embodiment. In this bonding step, the single-crystal silicon substrate 1 and the base substrate 5 are bonded together in a state where the contamination protective film 2 has been removed and the bonding surface has been subjected to a hydrophilic treatment. Thereafter, the peeling step shown in FIG. 6E is performed in the same manner as in the first embodiment, and the single crystal silicon substrate 1 is peeled at the peeling element distribution layer 17 and S
An OI structure is formed. Furthermore, a high-temperature heat treatment step is performed in the same manner as in the first embodiment after the peeling step is performed.
After the enhancement of the bonding strength of the bonded surfaces of FIGS. 5 and 5 and the promotion of the desorption of fluorine forming the crystal defect region 3 from the crystal structure, the flattening step shown in FIG. By executing the same as in the example, the SOI substrate 8 is completed.

In the fourth embodiment, when the contamination protection film 2 is left to function as an insulating isolation film having an SOI structure, the removal for removing the hydrogenated amorphous silicon film 18 is performed. The steps may be performed as needed.

(Fifth Embodiment) FIG. 7 shows the fourth embodiment.
A fifth embodiment of the present invention in which the embodiment is modified is shown, and only the portions different from the first and fourth embodiments will be described below. FIG. 7 is a schematic cross-sectional view showing the basic steps in the case of manufacturing an SOI substrate as in FIG.

That is, in the ion implantation step shown in FIG. 7A, the same processing as in the first ion implantation step in the first embodiment is performed. Next, in a film forming step shown in FIG. 7B, a hydrogenated amorphous silicon film 19 is formed on the base substrate 5.
(Corresponding to the hydrogenated amorphous semiconductor film in the present invention)
Is formed in the same manner as in the fourth embodiment.

Thereafter, a bonding step shown in FIG. 7C is performed. In this bonding step, first, the contamination protection film 2 on the single crystal silicon substrate 1 (this is finally
The surface of the contamination protection film 2 and the hydrogenated amorphous silicon film 19 of the base substrate 5 are subjected to a process for planarizing the surface of the base substrate 5.
The surface on the side is subjected to the same hydrophilic treatment as in the bonding step in the first embodiment. Thereafter, the single-crystal silicon 1 and the base substrate 5 are adhered to each other on the above-mentioned hydrophilized surface so that the substrates 1 and 5 are bonded to each other with silanol groups formed on the respective surfaces and hydrogen of water molecules adsorbed on the surfaces. Glue by bonding.

Next, in the diffusion step shown in FIG.
The single-crystal silicon substrate 1 and the base substrate 5 are subjected to a heat treatment at a temperature lower than the lower limit of the temperature at which the peeling phenomenon occurs (about 500 ° C. or higher). In response to such a heat treatment, hydrogen diffused in a solid phase from the hydrogenated amorphous silicon film 19 is taken into the crystal defect region 3, whereby a high concentration portion (crystal defect) in the crystal defect region 3 is obtained. (Relatively large portion), the stripping element distribution layer 17 located intensively is formed. In this case, the hydrogen concentration of the stripping element distribution layer 17 is 1 × 10 ²⁰ atoms /
It is desirable to set it to cm ³ or more. The heat treatment time (time required for the diffusion step) required to form the above-described separation element distribution layer 17 is considered to be substantially equal to the heat treatment time in the diffusion step in the third embodiment.

After the above-described diffusion step is performed, FIG.
The peeling step shown in (e) is performed in the same manner as in the first embodiment, and
The single crystal silicon substrate 1 is separated at the separation element distribution layer 17 to form an SOI structure. Furthermore, a high-temperature heat treatment step is performed in the same manner as in the first embodiment after the execution of the peeling step.
After enhancing the bonding strength of the bonding surfaces of the substrates 1 and 5 and promoting the desorption of fluorine constituting the crystal defect region 3 from the crystal structure, the flattening step shown in FIG. By performing the same operation as in the first embodiment, the SOI substrate 8 'is completed.

In the fifth embodiment, the contamination protection film 2 on the single crystal silicon substrate 1 is used as an insulating separation film when an SOI structure is finally formed. If an insulating film is formed on the hydrogenated amorphous silicon film 19 by thermal oxidation or the like, this insulating film can be used as an insulating separation film.
The contamination protection film 2 can be removed.

(Sixth Embodiment) FIG. 8 shows a sixth embodiment of the present invention. Only the portions different from the first embodiment will be described below. In addition, FIG.
FIG. 2 is a schematic cross-sectional view showing a basic process in the case of manufacturing an SOI substrate as in FIG.

That is, in the ion implantation step shown in FIG. 8A, the contamination protection film 2 made of a silicon oxide film is formed on the single crystal silicon substrate 1 by thermal oxidation or the like, and then the single crystal silicon substrate On the other hand, as shown by the arrow in the figure, from the contamination protective film 2 side, a compound (CH4, SiH4, Si2H3, H2O etc.)
Is implanted.

In ion implantation of such a hydride, several types of molecules formed by the crystal defect forming element and hydrogen can be selected. Specifically, CH4
In the case where is used, hydride ions such as CH3 ⁺ , CH2 ⁺ and CH ⁺ are generated in addition to CH4 ⁺ when ionized in the ion implantation apparatus. Each of these hydrides has a larger ion weight than hydrogen, helium, or the like, and thus easily forms a crystal defect region 20 in single-crystal silicon.
The element distribution layer 21 for stripping is formed by being arranged in 0.

In this case, the ion implantation energy is set according to the depth at which the crystal defect region 20 and the separation element distribution layer 21 are formed. The ion dose is 5 × 10 ¹⁵ atoms / cm in terms of hydrogen atoms.
^It is set to be ² or more, preferably 1 × 10 ¹⁶ atoms / cm ² or more.

Thereafter, the bonding steps shown in FIGS. 8B and 8C are performed in the same manner as in the first embodiment, and after the single crystal silicon substrate 1 and the base substrate 5 are bonded, The separation step shown in FIG. 8D is performed in the same manner as in the first embodiment, and the single crystal silicon substrate 1 is separated at the separation element distribution layer 21 to form an SOI structure. Furthermore, a high-temperature heat treatment step is performed in the same manner as in the first embodiment after the peeling step is performed, so that the bonding strength of the bonding surfaces of the two substrates 1 and 5 is enhanced, and the crystal structure of fluorine forming the crystal defect region 20 is reduced. After promoting the desorption from the substrate, the planarization process shown in FIG. 8E is performed in the same manner as in the first embodiment, and the SOI substrate 8 is completed.

According to the method of manufacturing the SOI substrate 8, the crystal defect region 20 made of a relatively heavy element and the crystal defect region 2
Since the stripping element distribution layer 21 made of hydrogen positioned at 0 is formed at the same time, it is not necessary to increase the dose in the ion implantation step. As a result, the throughput in the ion implantation step is improved, and it is not necessary to perform the ion implantation in a plurality of times, so that the time required for manufacturing the SOI substrate 8 can be greatly reduced as a whole.

(Other Embodiments) The present invention is not limited to the embodiments described above, and the following modifications or extensions are possible. The method of manufacturing the buried pattern structure described in the second embodiment can be applied to the third to sixth embodiments. Although the single-crystal silicon substrate 1 is used as the semiconductor substrate material, if it is a semiconductor mainly containing a group 4 element, for example, Ge, SiC, SiG
e or a substrate such as diamond can be used,
Alternatively, a substrate in which a single crystal film is formed by epitaxial growth on a polycrystalline silicon substrate or a single crystal or porous silicon substrate can be used. In the fourth and fifth embodiments, the hydrogenated amorphous silicon films 18 and 19 are formed as the hydrogenated amorphous semiconductor films. However, these may be formed based on other semiconductor materials. .

The material of the base substrate 5 is not limited to a single crystal silicon substrate, but may be another semiconductor substrate or a ceramic substrate or a glass substrate having an insulating property. In this case, if the base substrate itself has an insulating property, it is not necessary to provide the insulating film 6 on the base substrate 15.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view schematically showing a manufacturing method according to a first embodiment of the present invention.

FIG. 2 is a view showing a profile of a concentration distribution of fluorine and hydrogen in a single crystal silicon substrate at a stage during manufacturing.

FIG. 3 is a cross-sectional view schematically showing a manufacturing method according to a second embodiment of the present invention;

FIG. 4 is a cross-sectional view schematically showing a manufacturing method according to the second embodiment.

FIG. 5 is a schematic cross-sectional view showing a manufacturing method according to a third embodiment of the present invention.

FIG. 6 is a cross-sectional view schematically showing a manufacturing method according to a fourth embodiment of the present invention.

FIG. 7 is a cross-sectional view schematically showing a manufacturing method according to a fifth embodiment of the present invention.

FIG. 8 is a cross-sectional view schematically showing a manufacturing method according to a sixth embodiment of the present invention.

[Explanation of symbols]

1 is a single-crystal silicon substrate (semiconductor substrate material), 2 is a contamination protection film, 3 is a crystal defect region, 4 is an element distribution layer for peeling, 5
Is a base substrate, 6 is an insulating film, 7 is a single crystal silicon thin film (semiconductor layer), 8, 8 'are SOI substrates (semiconductor substrate),
9 is an insulating film, 10 is a polycrystalline silicon film, 11 is a buried pattern structure, 12 is a crystal defect region, 15 is a planarization film,
16 is an SOI substrate (semiconductor substrate), 17 is an element distribution layer for stripping, 18 and 19 are hydrogenated amorphous silicon films (hydrogenated amorphous semiconductor films), 20 is a crystal defect region,
Reference numeral 1 denotes an element distribution layer for peeling.

Claims (14)

[Claims] 1. A method of manufacturing a semiconductor substrate (8, 16) comprising a semiconductor layer (7) for element formation provided on a base substrate (5) in a state of being electrically insulated from the base substrate (5). In the method, relatively heavy ions are implanted from the surface of the semiconductor substrate material (1) for forming the semiconductor layer (7), thereby forming crystal defect regions (3, 12) distributed in a predetermined depth range. A first ion implantation step to be formed; and after or before the execution of the first ion implantation step,
A second step of forming a separation element distribution layer (4) in the crystal defect regions (3, 12) by implanting ions different from those in the first ion implantation step from the surface of the semiconductor substrate material (1). An ion implantation step, a bonding step of bonding the base substrate (5) and the semiconductor substrate material (1), and a heat treatment to remove the semiconductor substrate material (1) from the release element distribution layer (4). And a peeling step of forming the semiconductor layer (7) by peeling at a portion. 2. The method according to claim 1, wherein in the first ion implantation step, hydrogen,
2. The method of manufacturing a semiconductor substrate according to claim 1, wherein an ion species other than helium having a relatively large ion weight and capable of being desorbed from the semiconductor substrate material according to the heat treatment is used. 3. The method according to claim 2, wherein in the second ion implantation step, hydrogen,
3. The method according to claim 1, wherein an atomic ion or a molecular ion such as a rare gas is used. 4. A method of manufacturing a semiconductor substrate (8) comprising: forming a semiconductor layer (7) for element formation on a base substrate (5) in a state of being electrically insulated from the base substrate (5). Ion implantation for forming crystal defect regions (3) distributed in a predetermined depth range by implanting relatively heavy ions from the surface of the semiconductor substrate material (1) for forming the semiconductor layer (7); After the step of performing the ion implantation step, the semiconductor substrate material (1) is subjected to a heat treatment at a temperature lower than the temperature at which the peeling phenomenon occurs in an atmosphere containing an element different from the ion element implanted in the ion implantation step. A diffusion step of taking in the element into the crystal defect region (3) to form a separation element distribution layer (17) in the crystal defect region (3); A bonding step of bonding the semiconductor substrate material (1) to the semiconductor substrate material (1); and performing heat treatment to separate the semiconductor substrate material (1) at the separation element distribution layer (17). A method for manufacturing a semiconductor substrate, comprising: performing a peeling step of forming. 5. In the diffusion step, the heat treatment of the semiconductor substrate material (1) is performed in a gas atmosphere containing an element for causing a peeling phenomenon of the semiconductor substrate material (1) or a compound of the element. The method for manufacturing a semiconductor substrate according to claim 4, wherein: 6. In the diffusion step, the heat treatment of the semiconductor substrate material (1) is performed in an atmosphere in which an element for causing a peeling phenomenon of the semiconductor substrate material (1) or a compound of the element is turned into plasma. 5. The method for manufacturing a semiconductor substrate according to claim 4, wherein: 7. The method according to claim 4, wherein hydrogen, a rare gas element, or a hydride is used in the diffusion step. 8. A method of manufacturing a semiconductor substrate (8) comprising: forming a semiconductor layer (7) for element formation on a base substrate (5) in a state of being electrically insulated from the base substrate (5). Ion implantation for forming crystal defect regions (3) distributed in a predetermined depth range by implanting relatively heavy ions from the surface of the semiconductor substrate material (1) for forming the semiconductor layer (7); A film forming step of forming a hydrogenated amorphous semiconductor film (18) on the semiconductor substrate material (1);
By subjecting the semiconductor substrate material (1) to a heat treatment at a temperature lower than the temperature at which the separation phenomenon occurs, hydrogen diffused from the hydrogenated amorphous semiconductor film (18) is taken into the crystal defect region (3) and Crystal defect area (3)
A diffusion step of forming a peeling element distribution layer (17) therein; a bonding step of bonding the base substrate (5) and the semiconductor substrate material (1); (1) a peeling step of forming the semiconductor layer (7) by peeling off the peeling element distribution layer (17). 9. The method according to claim 8, wherein a removing step of removing the hydrogenated amorphous semiconductor film is performed before the bonding step. 10. A method for manufacturing a semiconductor substrate (8 ') comprising a semiconductor layer (7) for element formation provided on a base substrate (5) in a state of being electrically insulated from the base substrate (5). A relatively large weight of ions are implanted from the surface of the semiconductor substrate material (1) for forming the semiconductor layer (7) to form crystal defect regions (3) distributed in a predetermined depth range. An implantation step; a film forming step of forming a hydrogenated amorphous semiconductor film (19) on the base substrate (5); and a surface of the base substrate (5) on the hydrogenated amorphous semiconductor film (19) side and the semiconductor. A bonding step of bonding the substrate material (1) to the base substrate (5) and the semiconductor substrate material (1) after the bonding step; Arise By heat treatment of less than degrees temperatures, the hydrogen diffusing from the hydrogenated amorphous semiconductor film (19) in said crystal defect region (3)
A diffusion step of forming the element distribution layer (17) for separation in the crystal defect region (3), and performing a heat treatment to convert the semiconductor substrate material (1) to the element distribution layer (17) for separation. And a peeling step of forming the semiconductor layer (7) by peeling at a portion. 11. The method for manufacturing a semiconductor substrate according to claim 4, wherein in the ion implantation step, an ion species having a relatively large ion weight other than hydrogen and helium is used. 12. A method for manufacturing a semiconductor substrate (8) comprising: forming a semiconductor layer (7) for element formation on a base substrate (5) in a state of being electrically insulated from the base substrate (5). A predetermined depth is obtained by implanting hydrogen and hydride molecular ions composed of a compound of a relatively large crystal defect forming element from the surface of the semiconductor substrate material (1) for forming the semiconductor layer (7). An ion implantation step of forming a crystal defect region (20) composed of the crystal defect forming element distributed in a range and a separation element distribution layer (21) composed of hydrogen located in the crystal defect region (20); A bonding step of bonding the base substrate (5) and the semiconductor substrate material (1); and performing heat treatment to peel the semiconductor substrate material (1) at the separation element distribution layer (21). And a peeling step of forming the semiconductor layer (7) apart from each other. 13. A pattern structure forming step of forming a buried pattern structure (11) by performing a processing process on a surface side of the semiconductor substrate material (1) before the execution of the bonding step. 13. The buried pattern structure (11) is provided between the base substrate (5) and the semiconductor layer (7) by performing the peeling step later.
The method for manufacturing a semiconductor substrate according to any one of the above. 14. A pattern structure forming step of forming a buried pattern structure (11) by performing a processing process on a surface side of the base substrate (5) before performing the bonding step. The buried pattern structure (11) is provided between the base substrate (5) and the semiconductor layer (7) by performing the peeling step.
The method for manufacturing a semiconductor substrate according to any one of the above.