JPS56124950A - Data processing equipment - Google Patents

Data processing equipment

Info

Publication number
JPS56124950A
JPS56124950A JP2654980A JP2654980A JPS56124950A JP S56124950 A JPS56124950 A JP S56124950A JP 2654980 A JP2654980 A JP 2654980A JP 2654980 A JP2654980 A JP 2654980A JP S56124950 A JPS56124950 A JP S56124950A
Authority
JP
Japan
Prior art keywords
microinstruction
area
privilege
register
firmware
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2654980A
Other languages
Japanese (ja)
Inventor
Hideo Sawamoto
Koichi Ikeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2654980A priority Critical patent/JPS56124950A/en
Publication of JPS56124950A publication Critical patent/JPS56124950A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To elevate the reliability and workbility of an equipment, by suppressing the subsequent execution by a hardware means, when the contents of a fundamental area and a control register have been rewritten by mistake, by executing a microprogram which has been prepared by a user. CONSTITUTION:1 word of a microprogram which has been read out from the control memory device 1 is set to the fields F1-F3 of the contol register 4. Also, the device is made a fundamental area and a firmware area, and a specific microinstruction by which the contents of the fundamental area used in the firmware, and the register 4, etc. are rewritten by mistake is defined as a privilege microinstruction. And, the privilege microinstruction of each field F1-F3 is discriminated by the microinstruction discriminating circuits 6-8, and an output signal S4 is made ''1'' and is output from the OR gate 9. Also, an output signal S0 of the firmware area, which has been discriminated by the address discriminating circuit 5 is provided to the AND gate 10 together with the signal S4, and when there is a privilege microinstruction, it is suppressed to execute the subsequent instruction by the microinstruction execution suppressing circuit 11.
JP2654980A 1980-03-05 1980-03-05 Data processing equipment Pending JPS56124950A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2654980A JPS56124950A (en) 1980-03-05 1980-03-05 Data processing equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2654980A JPS56124950A (en) 1980-03-05 1980-03-05 Data processing equipment

Publications (1)

Publication Number Publication Date
JPS56124950A true JPS56124950A (en) 1981-09-30

Family

ID=12196588

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2654980A Pending JPS56124950A (en) 1980-03-05 1980-03-05 Data processing equipment

Country Status (1)

Country Link
JP (1) JPS56124950A (en)

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