JPS56124249A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS56124249A
JPS56124249A JP2753780A JP2753780A JPS56124249A JP S56124249 A JPS56124249 A JP S56124249A JP 2753780 A JP2753780 A JP 2753780A JP 2753780 A JP2753780 A JP 2753780A JP S56124249 A JPS56124249 A JP S56124249A
Authority
JP
Japan
Prior art keywords
heat
dissipating panel
resin
dissipating
panel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2753780A
Other languages
Japanese (ja)
Inventor
Hidetaka Ikuma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP2753780A priority Critical patent/JPS56124249A/en
Publication of JPS56124249A publication Critical patent/JPS56124249A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334—Auxiliary members in encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To eliminate warp of a heat-dissipating panel and cracking on an element, by providing metallic plates, which are the same as the heat-dissipating panel or whose thermal expansion coefficient is similar to that of the heat-dissipating panel, onto two mutually facing surfaces of a resin section of a resin-sealing device. CONSTITUTION:Onto a heat-dissipating panel of copper, etc., a semiconductor element 2 is soldered, and it is connected to a wire 6 and sealed by resin 3, and then, a metallic plate 4, which is same as the heat-dissipating panel 1 or whose thermal expansion coefficient is similar to that of the heat-dissipating panel 1, is attached onto the surface. In this mechanism, thermal distortion occurring between the heat-dissipating panel 1 and the resin 3 and also between the resin 3 and the metallic plate 4 are offset, and the heat-dissipating panel can be prevented from warp even when it is in a state of high temperature. And therefore, even at the time when this heat-dissipating panel was attached to an outside heat-dissipating unit, the thermal conductivity is not deteriorated, and the element 2 can be prevented from occurrence of crack.
JP2753780A 1980-03-05 1980-03-05 Semiconductor device Pending JPS56124249A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2753780A JPS56124249A (en) 1980-03-05 1980-03-05 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2753780A JPS56124249A (en) 1980-03-05 1980-03-05 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS56124249A true JPS56124249A (en) 1981-09-29

Family

ID=12223838

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2753780A Pending JPS56124249A (en) 1980-03-05 1980-03-05 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS56124249A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4984063A (en) * 1989-03-30 1991-01-08 Mitsubishi Denki Kabushiki Kaisha Semiconductor device
US5521429A (en) * 1993-11-25 1996-05-28 Sanyo Electric Co., Ltd. Surface-mount flat package semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4984063A (en) * 1989-03-30 1991-01-08 Mitsubishi Denki Kabushiki Kaisha Semiconductor device
US5521429A (en) * 1993-11-25 1996-05-28 Sanyo Electric Co., Ltd. Surface-mount flat package semiconductor device

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