JPS56120228A - Phase detector - Google Patents

Phase detector

Info

Publication number
JPS56120228A
JPS56120228A JP2280780A JP2280780A JPS56120228A JP S56120228 A JPS56120228 A JP S56120228A JP 2280780 A JP2280780 A JP 2280780A JP 2280780 A JP2280780 A JP 2280780A JP S56120228 A JPS56120228 A JP S56120228A
Authority
JP
Japan
Prior art keywords
input signal
output
sampled
maximum value
positive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2280780A
Other languages
Japanese (ja)
Inventor
Seiichiro Shigaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP2280780A priority Critical patent/JPS56120228A/en
Publication of JPS56120228A publication Critical patent/JPS56120228A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R25/00—Arrangements for measuring phase angle between a voltage and a current or between voltages or currents

Abstract

PURPOSE:To prevent the variance of output sampling clock due to the variance of characteristics of a narrow band filter, by comparing the input signal with a half the maximum value of positive and negative value of the input signal and shifting the sampling clock into 1/2 clock. CONSTITUTION:An equalized wave C is inputted, a comparator 1011 judges that the input signal is smaller than a half the positive maximum value of the input signal, a comparator 1012 judges that the input signal is smaller than a half the negative maximum value of the input signal, and the logical sum of the outputs is obtained at a logical sum gate 1013. Next, the output (a) is applied to a shift register 102 sampled at positive phase and a shift register 103 sampled at negative phase, and the output (a) at the leading and trailing of a sampled clock (b) is judged. Further, the output of the registers 102, 103 is applied a logicl operation circuit 104 consisting of exclusive logical sum gates 1041, 1042, inverter 1043, logical product gates 1044, 1045, the output of the logical product gates 1044, 1045 is stored in a register 105 to obtain outputs g, g'.
JP2280780A 1980-02-27 1980-02-27 Phase detector Pending JPS56120228A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2280780A JPS56120228A (en) 1980-02-27 1980-02-27 Phase detector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2280780A JPS56120228A (en) 1980-02-27 1980-02-27 Phase detector

Publications (1)

Publication Number Publication Date
JPS56120228A true JPS56120228A (en) 1981-09-21

Family

ID=12092954

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2280780A Pending JPS56120228A (en) 1980-02-27 1980-02-27 Phase detector

Country Status (1)

Country Link
JP (1) JPS56120228A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62241432A (en) * 1986-04-14 1987-10-22 Seiko Instr & Electronics Ltd Phase detecting circuit for alternating current power source

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62241432A (en) * 1986-04-14 1987-10-22 Seiko Instr & Electronics Ltd Phase detecting circuit for alternating current power source

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