JPS5457947A - Digital binary-ternary converter circuit - Google Patents
Digital binary-ternary converter circuitInfo
- Publication number
- JPS5457947A JPS5457947A JP12487377A JP12487377A JPS5457947A JP S5457947 A JPS5457947 A JP S5457947A JP 12487377 A JP12487377 A JP 12487377A JP 12487377 A JP12487377 A JP 12487377A JP S5457947 A JPS5457947 A JP S5457947A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- signals
- terminal
- sample
- ternary
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
- H04L25/4917—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes
- H04L25/4923—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes using ternary codes
Landscapes
- Physics & Mathematics (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
- Dc Digital Transmission (AREA)
Abstract
PURPOSE:To constitute simply a circuit converting one-sample one-bit binary signals to one-sample N-bit length ternary serial signals, by utilizing sampling synchronizing signals from a succeeding digital processor. CONSTITUTION:Sampling synchronizing signal a from a digital filter and a one- sample one-bit binary signal are inputted from terminal P3 and terminal P1 respectively, and sampling is performed at the timing of signal a by D-type FF11 to output signal (d). Signal (d) is separated into odd-numbered signals and even-numbered signals by inverter 12, circuit 13 dividing a frequency into two, and AND gates 14 and 15, thereby obtaining signals (e) and (f). Meanwhile, signal (b) is obtained by delaying signal a in shift register 16, and this signal (b) and signal (a) are inputted to SR-type FF17, and signal (c) from (Q) terminal and signals (e) and (f) are caused to pass through AND gates 18 and 19 and OR gate 20, and ternary signal (g) of 1, 0, and -1 is outputted to output terminal P2.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP52124873A JPS6036671B2 (en) | 1977-10-18 | 1977-10-18 | Digital 2-value to 3-value conversion circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP52124873A JPS6036671B2 (en) | 1977-10-18 | 1977-10-18 | Digital 2-value to 3-value conversion circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5457947A true JPS5457947A (en) | 1979-05-10 |
JPS6036671B2 JPS6036671B2 (en) | 1985-08-21 |
Family
ID=14896201
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP52124873A Expired JPS6036671B2 (en) | 1977-10-18 | 1977-10-18 | Digital 2-value to 3-value conversion circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6036671B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009502046A (en) * | 2004-12-09 | 2009-01-22 | タング,ボブ | Method for increasing channel capacity by three states of +1, -1 and zero without the need to reduce signal-to-noise margin due to intersymbol interference |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61166867U (en) * | 1985-04-04 | 1986-10-16 | ||
JPS62173485A (en) * | 1986-01-27 | 1987-07-30 | 株式会社 正進社 | Learning system |
JPH07309085A (en) * | 1994-05-16 | 1995-11-28 | Houyuu Shuppan Kk | Book |
-
1977
- 1977-10-18 JP JP52124873A patent/JPS6036671B2/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009502046A (en) * | 2004-12-09 | 2009-01-22 | タング,ボブ | Method for increasing channel capacity by three states of +1, -1 and zero without the need to reduce signal-to-noise margin due to intersymbol interference |
Also Published As
Publication number | Publication date |
---|---|
JPS6036671B2 (en) | 1985-08-21 |
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