JPS56111312A - Wave detecting circuit - Google Patents

Wave detecting circuit

Info

Publication number
JPS56111312A
JPS56111312A JP1410780A JP1410780A JPS56111312A JP S56111312 A JPS56111312 A JP S56111312A JP 1410780 A JP1410780 A JP 1410780A JP 1410780 A JP1410780 A JP 1410780A JP S56111312 A JPS56111312 A JP S56111312A
Authority
JP
Japan
Prior art keywords
input signal
type
frequency
detecting
detecting circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1410780A
Other languages
Japanese (ja)
Other versions
JPS6334650B2 (en
Inventor
Michio Sasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP1410780A priority Critical patent/JPS56111312A/en
Publication of JPS56111312A publication Critical patent/JPS56111312A/en
Publication of JPS6334650B2 publication Critical patent/JPS6334650B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R23/00—Arrangements for measuring frequencies; Arrangements for analysing frequency spectra

Abstract

PURPOSE:To detect arrival of a desired frequency accurately by applying an input signal to a digital filter and by detecting its frequency. CONSTITUTION:With clock 55 obtained by dividing the period of queuing frequency f0 into six phases, shift register 57 reads input signal 56 converted into codes ''1'' and ''0''. In D type F-Fs 60-65, [000111] is set and when this set value coincides with the contents of register 57, the output of gate 72 is generated to open gate 73. Consequently, while n-bit counter 74 starts counting, values of D type F-Fs 60-65 circulate. Therefore, as far as input signal 56 has the periodicity of [000111], counter 74 continues counting operation and when it goes up to n-bits, R-S type F-F75 is set, thereby detecting arrival of a desired frequency.
JP1410780A 1980-02-06 1980-02-06 Wave detecting circuit Granted JPS56111312A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1410780A JPS56111312A (en) 1980-02-06 1980-02-06 Wave detecting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1410780A JPS56111312A (en) 1980-02-06 1980-02-06 Wave detecting circuit

Publications (2)

Publication Number Publication Date
JPS56111312A true JPS56111312A (en) 1981-09-03
JPS6334650B2 JPS6334650B2 (en) 1988-07-12

Family

ID=11851887

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1410780A Granted JPS56111312A (en) 1980-02-06 1980-02-06 Wave detecting circuit

Country Status (1)

Country Link
JP (1) JPS56111312A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02117241U (en) * 1989-03-09 1990-09-19

Also Published As

Publication number Publication date
JPS6334650B2 (en) 1988-07-12

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