JPS56119863A - Testing method for printed board unit - Google Patents

Testing method for printed board unit

Info

Publication number
JPS56119863A
JPS56119863A JP2314280A JP2314280A JPS56119863A JP S56119863 A JPS56119863 A JP S56119863A JP 2314280 A JP2314280 A JP 2314280A JP 2314280 A JP2314280 A JP 2314280A JP S56119863 A JPS56119863 A JP S56119863A
Authority
JP
Japan
Prior art keywords
printed board
test
board unit
test signal
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2314280A
Other languages
Japanese (ja)
Other versions
JPS6317191B2 (en
Inventor
Kikuo Nakatani
Yoichi Iijima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2314280A priority Critical patent/JPS56119863A/en
Publication of JPS56119863A publication Critical patent/JPS56119863A/en
Publication of JPS6317191B2 publication Critical patent/JPS6317191B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
    • G01R31/2818—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP] using test structures on, or modifications of, the card under test, made for the purpose of testing, e.g. additional components or connectors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

PURPOSE:To make a lining test to each printed board in a prescribed time without interruption, by equipping each printed board unit with a test signal generating circuit. CONSTITUTION:Circuit part 2 of printed board 1 is provided with input terminal 5, output terminal 7 and power terminal 4, and output 6 of test signal generating circuit 3 is connected to the input terminal of circuit part 2. With a test signal from test terminal 8, test signal generating circuit 3 is actuated and a test signal from input terminal 5 is supplied to circuit part 2 to start a test. Thus, there is no need to connect each printed board unit as actual circuit constitution and even if all printed board units are not packaged, a burn-in test of the operation of each printed board unit is feasible.
JP2314280A 1980-02-26 1980-02-26 Testing method for printed board unit Granted JPS56119863A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2314280A JPS56119863A (en) 1980-02-26 1980-02-26 Testing method for printed board unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2314280A JPS56119863A (en) 1980-02-26 1980-02-26 Testing method for printed board unit

Publications (2)

Publication Number Publication Date
JPS56119863A true JPS56119863A (en) 1981-09-19
JPS6317191B2 JPS6317191B2 (en) 1988-04-12

Family

ID=12102304

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2314280A Granted JPS56119863A (en) 1980-02-26 1980-02-26 Testing method for printed board unit

Country Status (1)

Country Link
JP (1) JPS56119863A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5348678A (en) * 1976-10-15 1978-05-02 Toshiba Corp Integrated circuit package

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5348678A (en) * 1976-10-15 1978-05-02 Toshiba Corp Integrated circuit package

Also Published As

Publication number Publication date
JPS6317191B2 (en) 1988-04-12

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