JPS56119533A - Pll circuit - Google Patents

Pll circuit

Info

Publication number
JPS56119533A
JPS56119533A JP2229180A JP2229180A JPS56119533A JP S56119533 A JPS56119533 A JP S56119533A JP 2229180 A JP2229180 A JP 2229180A JP 2229180 A JP2229180 A JP 2229180A JP S56119533 A JPS56119533 A JP S56119533A
Authority
JP
Japan
Prior art keywords
output signal
circuit
signal
phase error
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2229180A
Other languages
Japanese (ja)
Other versions
JPS6339129B2 (en
Inventor
Toyotaro Sawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP2229180A priority Critical patent/JPS56119533A/en
Publication of JPS56119533A publication Critical patent/JPS56119533A/en
Publication of JPS6339129B2 publication Critical patent/JPS6339129B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/10—Indirect frequency synthesis using a frequency multiplier in the phase-locked loop or in the reference signal path

Abstract

PURPOSE:To reduce the influence upon S/N and C/N of the output signal to make the PLL circuit into IC and small-size considerably, by multiplying the output signal of the quartz oscillating circuit to use this multiplied signgl as the reference frequency signal. CONSTITUTION:Frequnency fR obtained by multiplying frequency fXO of quartz oscillator 21 by factor L is used as the reference frequency signal, and the phase error between this signal and the output signal of voltage control oscillator 25 is detected, and a phase error voltage corresponding to this phase error is used as the control voltage to control output frequency fO of voltage control oscillator 25, thereby reducing the influence of the noise, which is generated from phase comparator 23 or frequency divider 24, upon S/N and C/N of the output signal of the PLL circuit. Consequently, the circuit constitution is simplified, and the circuit is made into IC and small-size considerably.
JP2229180A 1980-02-26 1980-02-26 Pll circuit Granted JPS56119533A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2229180A JPS56119533A (en) 1980-02-26 1980-02-26 Pll circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2229180A JPS56119533A (en) 1980-02-26 1980-02-26 Pll circuit

Publications (2)

Publication Number Publication Date
JPS56119533A true JPS56119533A (en) 1981-09-19
JPS6339129B2 JPS6339129B2 (en) 1988-08-03

Family

ID=12078638

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2229180A Granted JPS56119533A (en) 1980-02-26 1980-02-26 Pll circuit

Country Status (1)

Country Link
JP (1) JPS56119533A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5887431A (en) * 1981-11-20 1983-05-25 Hitachi Ltd Double spectrometer
WO1999041838A1 (en) * 1998-02-13 1999-08-19 Matsushita Electric Industrial Co., Ltd. Oscillation circuit scheme, modulation scheme, demodulation scheme, and multilevel qam modulation/demodulation system

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5416962A (en) * 1977-07-07 1979-02-07 Mitsubishi Electric Corp Frquency synthesizer
JPS54118759A (en) * 1978-03-08 1979-09-14 Hitachi Denshi Ltd Synthesized oscillator for radio device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5416962A (en) * 1977-07-07 1979-02-07 Mitsubishi Electric Corp Frquency synthesizer
JPS54118759A (en) * 1978-03-08 1979-09-14 Hitachi Denshi Ltd Synthesized oscillator for radio device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5887431A (en) * 1981-11-20 1983-05-25 Hitachi Ltd Double spectrometer
WO1999041838A1 (en) * 1998-02-13 1999-08-19 Matsushita Electric Industrial Co., Ltd. Oscillation circuit scheme, modulation scheme, demodulation scheme, and multilevel qam modulation/demodulation system

Also Published As

Publication number Publication date
JPS6339129B2 (en) 1988-08-03

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