JPS54118759A - Synthesized oscillator for radio device - Google Patents

Synthesized oscillator for radio device

Info

Publication number
JPS54118759A
JPS54118759A JP2541078A JP2541078A JPS54118759A JP S54118759 A JPS54118759 A JP S54118759A JP 2541078 A JP2541078 A JP 2541078A JP 2541078 A JP2541078 A JP 2541078A JP S54118759 A JPS54118759 A JP S54118759A
Authority
JP
Japan
Prior art keywords
output
division
noise
oscillator
supplied
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2541078A
Other languages
Japanese (ja)
Inventor
Yukinari Fujiwara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Denshi KK
Original Assignee
Hitachi Denshi KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Denshi KK filed Critical Hitachi Denshi KK
Priority to JP2541078A priority Critical patent/JPS54118759A/en
Publication of JPS54118759A publication Critical patent/JPS54118759A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/185—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using a mixer in the loop

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE:To realize reduction for the noise, the structure measurements and the cost by constituting the PLL circuit using the voltage control oscillator featuring the oscillation frequency of M- times as high as the final output frequency and then giving M step-division to the output of the voltage control oscillator to obtain the final output. CONSTITUTION:The N1 step-division is given via fixed divider 2 to the output of reference oscillatol 1 featuring the oscillation frequency of M-times as high as the output frequency and then supplied to phase comparator 3. While the output of voltage control oscillator MC010 is mixed with the output of reference oscillator 6 via mixer 7 and undergoes N2 step-division at variable divider 4 through band pass filter 5 which draws out only the difference frequency component to be supplied to comparator 3 where the phase comparison is given with the reference signal given from cscillator 1 with N1 step-division applied. Then the error signal is supplied to VC010 via loop filter 8 and LPF9 to be used for the phase synchronization of VC010. The output of VC010 undergoes M step-division through step-divider 12 to be delivered through terminal 11. In this constitution, the final output phase noise is reduced down to 1/M the output noise of VC010, thus ensuring easy reduction of the noise along with use of the low-noise crystal oscillator to oscillator 1.
JP2541078A 1978-03-08 1978-03-08 Synthesized oscillator for radio device Pending JPS54118759A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2541078A JPS54118759A (en) 1978-03-08 1978-03-08 Synthesized oscillator for radio device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2541078A JPS54118759A (en) 1978-03-08 1978-03-08 Synthesized oscillator for radio device

Publications (1)

Publication Number Publication Date
JPS54118759A true JPS54118759A (en) 1979-09-14

Family

ID=12165141

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2541078A Pending JPS54118759A (en) 1978-03-08 1978-03-08 Synthesized oscillator for radio device

Country Status (1)

Country Link
JP (1) JPS54118759A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56119533A (en) * 1980-02-26 1981-09-19 Toshiba Corp Pll circuit
EP0409127A2 (en) * 1989-07-17 1991-01-23 Nec Corporation Phase-locked loop type frequency synthesizer having improved loop response

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56119533A (en) * 1980-02-26 1981-09-19 Toshiba Corp Pll circuit
JPS6339129B2 (en) * 1980-02-26 1988-08-03 Tokyo Shibaura Electric Co
EP0409127A2 (en) * 1989-07-17 1991-01-23 Nec Corporation Phase-locked loop type frequency synthesizer having improved loop response
EP0409127A3 (en) * 1989-07-17 1991-04-10 Nec Corporation Phase-locked loop type frequency synthesizer having improved loop response

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